Thin film transistor formed on insulating substrate

Claim 2

A coplanar thin film transistor formed on an insulating substrate, comprising: a glass substrate; a thin semiconductor film formed on said glass substrate and having the form of an island, said thin semiconductor film being in one of a polycrystalline state and an amorphous state and including silicon; a gate structure formed on part of the thin semiconductor film, the gate structure including a gate insulating film and a gate electrode formed on the gate insulating film and made of platinum silicide, said gate insulating film being formed on said thin semiconductor film; and a pair of intermetallic compound layers formed in said thin semiconductor film at such locations that a portion of said thin semiconductor film which exists beneath said gate insulating film is sandwiched between said intermetallic compound layers, each of the intermetallic compound layers being formed of a metal silicide, the pair of intermetallic compound layers respectively constituting a source region and a drain region of the transistor, and said portion of said thin semiconductor film being a channel between the source and drain regions, and each of said intermetallic compound layers being insulated from said gate electrode by said gate insulating film, the metal silicide of each of said intermetallic compound layers being formed of a metal and silicon forming said thin semiconductor film.

Claim 3

A coplanar thin film transistor according to claim 1, wherein a metal for making said intermetallic compound layers is selected from a group consisting of platinum, molybdenum, tungsten, titanium, palladium and mixtures of these metals.

Claim 4

A coplanar thin film transistor according to claim 1, wherein said gate electrode includes a first layer made of a semiconductor material and a second layer made of platinum silicide.

Claim 5

A coplanar thin film transistor according to claim 3, wherein said first layer is in one of a polycrystalline state and an amorphous state.

Claim 6

A coplanar thin film transistor according to claim 3, wherein said first layer is in one of a polycrystalline state and an amorphous state, and each of said first layer and said thin semiconductor film contains hydrogen.

Claim 7

A coplanar thin film transistor according to claim 1, wherein said gate electrode and said intermetallic compound layers serve as conductors for connecting a plurality of thin film transistors.

Claim 8

A coplanar thin film transistor according to claim 1, further comprising lead-out conductors formed respectively on said pair of intermetallic compound layers.

Claim 9

A coplanar thin film transistor according to claim 1, wherein said intermetallic compound is a compound formed at the interface of said metal and semiconductor material when heating the metal and semiconductor material.

Claim 10

A coplanar thin film transistor according to claim 1, wherein the surface of the thin semiconductor film furthest from the substrate is substantially planar with the pair of intermetallic compound layers and is in substantially the same plane as the bottom of the gate insulating film.

Claim 11

A coplanar thin film transistor according to claim 1, wherein said portion of the thin semiconductor film constituting a channel between the source and drain contains hydrogen.

Claim 12

A coplanar thin film transistor according to claim 1, wherein the source and drain regions of the transistor consist essentially of said intermetallic compound layers.

Claim 13

A coplanar thin film transistor according to claim 1, wherein said pair of intermetallic compound layers are in self-alignment with the gate structure.

Claim 14

A coplanar thin film transistor according to claim 1, wherein said portion of said thin semiconductor film is a portion undercut beneath the gate insulating film, whereby the gate insulating film extends beyond the periphery of said portion of said thin semiconductor film.

Claim 15

A coplanar thin film transistor according to claim 13, wherein the surface of the thin semiconductor film furthest from the substrate is substantially planar with the pair of intermetallic compound layers and is in substantially the same plane as the bottom of the gate insulating film.

Claim 16

A coplanar thin film transistor according to claim 1, wherein the glass substrate is made of a glass having a softening temperature of about 600° C.

Claim 17

A coplanar thin film transistor according to claim 15, wherein the metal of the metal silicide of each of the intermetallic compound layers is platinum.

Claim 18

A coplanar thin film transistor according to claim 1, wherein the metal of the metal silicide of each of the intermetallic compound layers is platinum.

Claim 19

A coplanar thin film transistor formed on an insulating substrate, comprising: a glass substrate; a thin semiconductor film formed on said glass substrate and having the form of an island, said thin semiconductor film being in one of a polycrystalline state and an amorphous state and including silicon; a gate structure formed on part of the thin semiconductor film, the gate structure including a gate insulating film and a gate electrode formed on the gate insulating film and made of platinum silicide, said gate insulating film being formed on said thin semiconductor film; and a pair of intermetallic compound layers formed in said thin semiconductor film at such locations that a portion of said thin semiconductor film which exists beneath said gate insulating film is sandwiched between said intermetallic compound layers, each of the intermetallic compound layers being formed of a metal silicide, the pair of intermetallic compound layers respectively constituting a source region and a drain region of the transistor, and said portion of said thin semiconductor film being a channel between the source and drain regions, and each of said intermetallic compound layers being insulated from said gate electrode by said gate insulating film, the metal silicide of each of said intermetallic compound layers being formed of a metal and silicon forming said thin semiconductor film; wherein the gate electrode and pair of intermetallic compound layers are a gate electrode and layers formed by providing said gate insulating film on said thin semiconductor film and a silicon layer on the gate insulating film; etching the thin semiconductor film so as to undercut the gate insulating film; after the etching, depositing a platinum film on silicon of the thin semiconductor film, and on the silicon layer on the gate insulating film; and forming platinum silicide of the intermetallic compound layers and of the gate electrode by annealing, whereby the gate electrode and intermetallic compound layers are in self-alignment.

Claim 20

A coplanar thin film transistor formed on an insulating substrate, comprising: a glass substrate; a thin semiconductor film formed on said glass substrate and having the form of an island, said thin semiconductor film being in one of a polycrystalline state and an amorphous state and including silicon; a gate structure formed on part of the thin semiconductor film, the gate structure including a gate insulating film and a gate electrode formed on the gate insulating film and made of platinum silicide, said gate insulating film being formed on said thin semiconductor film; and a pair of intermetallic compound layers formed in said thin semiconductor film at such locations that a portion of said thin semiconductor film which exists beneath said gate insulating film is sandwiched between said intermetallic compound layers, each of the intermetallic compound layers being formed of a metal silicide, the pair of intermetallic compound layers respectively constituting a source region and a drain region of the transistor, and said portion of said thin semiconductor film being a channel between the source and drain regions, and each of said intermetallic compound layers being insulated from said gate electrode by said gate insulating film, the metal silicide of each of said intermetallic compound layers being formed of a metal and silicon forming said thin semiconductor film; wherein the gate electrode and pair of intermetallic compound layers are a gate electrode and layers formed by providing said gate insulating film on said thin semiconductor film and a silicon layer on the gate insulating film; etching the thin semiconductor film so as to undercut the gate insulating film; after the etching, depositing a platinum film on silicon of the thin semiconductor film, and on the silicon layer on the gate insulating film; and forming platinum silicide of the intermetallic compound layers and of the gate electrode by annealing, whereby the gate electrode and intermetallic compound layers are in self-alignment.

Claim 21

A coplanar thin film transistor according to claim 18, wherein the silicon layer on the gate insulating film is a polycrystalline silicon layer.

Claim 22

A coplanar thin film transistor according to claim 18, wherein the glass substrate is made of a glass having a softening temperature of about 600° C.

Claim 23

A coplanar thin film transistor according to claim 18, wherein the thin semiconductor film is made solely of amorphous or polycrystalline silicon.

Claim 24

A coplanar thin film transistor according to claim 21, wherein the glass substrate is made of a glass having a softening temperature of about 600° C.