Dynamic random access memory device including a stack capacitor

Claim 2

A dynamic random access memory device comprising: a semiconductor substrate having a source region and a drain region; a first insulation film formed on a surface of the semiconductor substrate; a gate electrode formed on the first insulation film; a second insulation film formed so as to cover the gate electrode; a bit line formed on the second insulation film, the bit line being in contact with the source region through a first opening formed in at least the second insulation film; a third insulation film formed so as to cover the bit line; a storage electrode formed on the third insulation film and being in contact with the drain region through a second opening formed in at least the second and third insulation films; a dielectric film formed so as to surround the storage electrode; and an opposed electrode formed so as to cover the dielectric film.

Claim 3

A dynamic random access memory device as claimed in claim 1, wherein the first opening and the second opening are aligned in the direction of extension of the bit line.

Claim 4

A dynamic random access memory device as claimed in claim 1, wherein a distance between the bit line and the first opening is smaller than a distance between the bit line and the second opening.

Claim 5

A dynamic random access memory device as claimed in claim 1, wherein the second opening is a contact hole formed by self-alignment in which the bit line itself is used as a mask film.

Claim 6

A dynamic random access memory device as claimed in claim 1, wherein the bit line comprises a polycide film composed of a polysilicon film, and a refractory metal film formed on said polysilicon film.

Claim 7

A dynamic random access memory device as claimed in claim 1, further comprising an insulation side wall film formed so as to surround a side wall of the bit line.

Claim 8

A dynamic random access memory device as claimed in claim 1, further comprising an insulation side wall film formed so as to surround a side wall of the gate electrode.

Claim 9

A dynamic random access memory device as claimed in claim 1, wherein the storage electrode comprises a vertical portion which is in contact with the drain region, and wing portions which are separated from each other with a gap and are connected to the vertical portion.

Claim 10

A dynamic random access memory device as claimed in claim 1, wherein the wing portions of the storage electrode extend above the gate electrode.

Claim 11

A dynamic random access memory device as claimed in claim 1, wherein said first insulation film is a gate insulation film, wherein said first opening is formed in said first and second insulation films, and wherein said second opening is formed in said first, second and third insulation films.

Claim 12

A dynamic random access memory device, comprising: a semiconductor substrate having a source region and a drain region; a gate insulation film formed on a surface of said semiconductor substrate; a gate electrode formed on said gate insulation film; a first insulation film formed covering said gate electrode; a first opening formed in said first insulation film and formed over said source region; a bit line formed on said first insulation film, said bit line being in contact with said source region through said first opening formed in said first insulation film; a second insulation film formed covering said bit line; a second opening formed in said first and second insulation films and over said drain region; a storage electrode extending above said second insulation film and being in contact with said drain region through said second opening formed in said first and second insulation films; a dielectric film formed surrounding said storage electrode; and an opposed electrode formed covering said dielectric film.

Claim 13

A dynamic random access memory device, comprising: a semiconductor substrate having a source region and a drain region; a gate insulation film formed on a surface of said semiconductor substrate; a gate electrode formed on said gate insulation film; a first insulation film formed covering said gate electrode; a first opening formed in said first insulation film and formed over said source region; a bit line formed on said first insulation film, said bit line being in contact with said source region through said first opening formed in said first insulation film; a second insulation film formed covering said bit line; a second opening formed in said first and second insulation films and over said drain region; a storage electrode extending above said second insulation film and being in contact with said drain region through said second opening formed in said first and second insulation films; a dielectric film formed surrounding said storage electrode; and an opposed electrode formed covering said dielectric film.

Claim 14

A dynamic random access memory device as claimed in claim 11, wherein said first opening and said second opening are aligned in a direction in which said bit line extends.

Claim 15

A dynamic random access memory device as claimed in claim 11, wherein a distance between said bit line and said first opening is smaller than a distance between said bit line and said second opening.

Claim 16

A dynamic random access memory device as claimed in claim 11, wherein said second opening is a contact hole formed by self alignment in which said bit line is used as a mask film.

Claim 17

A dynamic random access memory device as claimed in claim 11, wherein said bit line comprises polycide film composed of a polysilicon film, and a refractory metal film formed on said polysilicon film.

Claim 18

A dynamic random access memory device as claimed in claim 11, further comprising an insulation side wall film formed surrounding a side wall of said bit line.

Claim 19

A dynamic random access memory device as claimed in claim 11, further comprising an insulation side wall film formed surrounding a side wall of said gate electrode.

Claim 20

A dynamic random access memory device as claimed in claim 11, wherein said first opening is formed in said gate insulation film and said first insulation film, and said second opening is formed in said gate insulation film and said first and second insulation films.