Method for transverse-current-free operation of a push-pull circuit, and apparatus for performing the method

Claim 2

In a method for transverse-current-free operation of a push-pull circuit configuration having two output transistor arrays of complementary types with output circuits interconnected in series, and a trigger circuit triggering the output transistor arrays with two push-pull signals being derived from one input signal and having mutually associated edges consecutively following one another with temporal separation for detecting output currents of the output transistor arrays, the improvement which comprises releasing the particular triggering push-pull signal for an output transistor array without delay whenever the output current of the complementary output transistor arrays drops below a predetermined positive minimum value, detecting base-to-emitter voltages of the complementary output transistor arrays for determining their output currents, and comparing said base-to-emitter voltages, using respective positive reference voltages as minimum values.

Claim 3

Apparatus for transverse-current-free operation of a push-pull circuit configuration in combination with the push-pull circuit configuration, comprising two output transistor arrays of complementary types with output circuits interconnected in series, and a trigger circuit triggering said output transistor arrays with two push-pull signals being derived from one input signal and having mutually associated edges consecutively following one another with temporal separation, and detecting output currents of the output transistor arrays for releasing the particular triggering push-pull signal for an output transistor array without delay whenever the output current of the complementary output transistor arrays drop below a predetermined positive minimum value, said trigger circuit including logical linkage elements each having first and second inputs, and comparators associated with said output transistor arrays for detecting the predetermined minimum output currents, said comparators each having an output cross-coupled directly to the first input of a respective one of said logical linkage element, the second input of one of said logical linkage elements receiving the input signal and the second input of the other of said logical linkage elements receiving an inverted input signal; wherein each of said comparators has two inputs, one input of each of said comparators is connected to the base of a respective one of said output transistor arrays, and including reference voltage sources each being connected between the other input of a respective one of said comparators and the emitter of a respective one of said output transistor arrays.

Claim 4

Apparatus for transverse-current-free operation of a push-pull circuit configuration in combination with the push-pull circuit configuration, comprising two output transistor arrays of complementary types with output circuits interconnected in series, and a trigger circuit triggering said output transistor arrays with two push-pull signals being derived from one input signal and having mutually associated edges consecutively following one another with temporal separation, and detecting output currents of the output transistor arrays for releasing the particular triggering push-pull signal for an output transistor array without delay whenever the output current of the complementary output transistor arrays drop below a predetermined positive minimum value, said trigger circuit including logical linkage elements each having first and second inputs, and comparators associated with said output transistor arrays for detecting the predetermined minimum output currents, said comparators each having an output cross-coupled directly to the first input of a respective one of said logical linkage element, the second input of one of said logical linkage elements receiving the input signal and the second input of the other of said logical linkage elements receiving an inverted input signal; wherein each of said comparators has two inputs, one input of each of said comparators is connected to the base of a respective one of said output transistor arrays, and including reference voltage sources each being connected between the other input of a respective one of said comparators and the emitter of a respective one of said output transistor arrays.

Claim 5

Apparatus according to claim 2, wherein said logical linkage elements are AND gates having outputs, and including buffer amplifiers each being connected to the output of a respective one of said AND gates.

Claim 6

Apparatus for transverse-current-free operation of a push-pull circuit configuration in combination with the push-pull circuit configuration, comprising two output transistor arrays of complementary types with output circuits interconnected in series, and a trigger circuit triggering said output transistor arrays including logical linkage elements each having first and second inputs, and comparators associated with said output transistor arrays, said comparators each having an output cross-coupled directly to the first input of a respective one of said logical linkage elements, the second input of one of said logical linkage elements receiving the input signal and the second input of the other of said logical linkage elements receiving an inverted input signal; wherein each of said comparators has two inputs, one input of each of said comparators is connected to the base of a respective one of said output transistor arrays, and including reference voltage sources each being connected between the other input of a respective one of said comparators and the emitter of a respective one of said output transistor arrays.

Claim 7

Apparatus for transverse-current-free operation of a push-pull circuit configuration in combination with the push-pull circuit configuration, comprising two output transistor arrays of complementary types with output circuits interconnected in series, and a trigger circuit triggering said output transistor arrays including logical linkage elements each having first and second inputs, and comparators associated with said output transistor arrays, said comparators each having an output cross-coupled directly to the first input of a respective one of said logical linkage elements, the second input of one of said logical linkage elements receiving the input signal and the second input of the other of said logical linkage elements receiving an inverted input signal; wherein each of said comparators has two inputs, one input of each of said comparators is connected to the base of a respective one of said output transistor arrays, and including reference voltage sources each being connected between the other input of a respective one of said comparators and the emitter of a respective one of said output transistor arrays.