Patent US3209391A successfully refreshed from Google Patents.
Patent US4723250A successfully refreshed from Google Patents.
Patent US3400984A successfully refreshed from Google Patents.
US4095128A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Push-pull switching circuit with minority carrier storage delay
Assignee: Furuno Electric Co Ltd
•
Filing: 1977-02-01
•
Granted: 1978-06-13
•
Expires: 1997-02-01
Abstract
Abstract A push-pull switching circuit including two grounded emitter transistors 5, 6 controlled by a pair of AND gates 3, 4. The collector output of each transistor is fed back to an input of the AND gate controlling the other transistor, the remaining AND gate inputs being supplied by the Q and Q outputs of a flip-flop circuit 2. During the prolonged conduction of each transistor due to minority carrier storage, its lowered collector potential prevents the enabled AND gate for the other transistor from raising its output and initiating conduction, thereby avoiding overlapping or simultaneous transistor conduction.
Inventors
- 👤 Hidetoshi Tanigaki
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 13:05
CPC Classifications
H; H02; H02M; H02M7/00; H02M7/42; H02M7/44; H02M7/48; H02M7/53; H02M7/537; H02M7/5383; H02M7/53846; H02M3/00; H02M3/22; H02M3/24; H02M3/28; H02M3/325; H02M3/335; H02M3/337; H02M3/3376; H02M3/3378; H03; H03K; H03K17/00; H03K17/51; H03K17/56; H03K17/60; H03K17/62; H03K17/6285
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
175 words
In a push-pull semiconductor switching circuit including an output transformer, first and second grounded emitter transistors whose collectors are connected to opposite ends of the primary winding of the transformer, and a pulse generator for alternately controlling the conduction of the transistors, the improvements characterized by: (a) a flip-flop circuit for producing Q and Q output signals in response to the pulse generator, (b) first and second AND gates each having one of its inputs respectively coupled to the Q and Q outputs of the flip-flop circuit, and their outputs connected to the bases of the first and second transistors, respectively, (c) means connecting the collector of the first transistor to the other input of the second AND gate, and (d) means connecting the collector of the second transistor to the other input of the first AND gate, (e) each connecting means comprising a first resistor, a second, grounded resistor connected to the first resistor to form a voltage divider therewith, and a voltage limiter connected to the junction of the first and second resistors.
Claim 2
Dependent Claim
175 words
In a push-pull semiconductor switching circuit including an output transformer, first and second grounded emitter transistors whose collectors are connected to opposite ends of the primary winding of the transformer, and a pulse generator for alternately controlling the conduction of the transistors, the improvements characterized by: (a) a flip-flop circuit for producing Q and Q output signals in response to the pulse generator, (b) first and second AND gates each having one of its inputs respectively coupled to the Q and Q outputs of the flip-flop circuit, and their outputs connected to the bases of the first and second transistors, respectively, (c) means connecting the collector of the first transistor to the other input of the second AND gate, and (d) means connecting the collector of the second transistor to the other input of the first AND gate, (e) each connecting means comprising a first resistor, a second, grounded resistor connected to the first resistor to form a voltage divider therewith, and a voltage limiter connected to the junction of the first and second resistors.
Claim 3
Dependent Claim
22 words
A semiconductor switching circuit as defined in claim 1, wherein each voltage limiter comprises a diode connected to a D.C. voltage source.
Claim 4
Dependent Claim
25 words
A push-pull semiconductor switching circuit as defined in claim 1, wherein each connecting means further comprises a diode connected in series with said first resistor.
Claim 5
Dependent Claim
23 words
A push-pull semiconductor switching circuit as defined in claim 3, wherein each voltage limiter comprises a diode connected to a DC voltage source.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1981-06-12 | 1981-12-12 | 1982-06-13 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1985-06-12 | 1985-12-12 | 1986-06-13 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1989-06-12 | 1989-12-12 | 1990-06-13 | $7700.00 | Window Closed / Lapsed |