Circuit for sensing the state of matrix cells in MOS EPROM memories including an offset current generator

Claim 2

A circuit for sensing the virgin or written state of a matrix cell in MOS EPROM memories comprising: (a) at least one matrix cell; (b) a plurality of load means; (c) a virgin reference cell, said matrix cell and said virgin reference cell having their respective sources connected to ground, having their respective drains connected to a voltage supply through respective ones of said plurality of load means, and their respective gates mutually interconnected with one another and controlled by a selection voltage; (d) a differential amplifier having a first input and a second input respectively connected to said respective ones of said load means, said differential amplifier sensing the respective currents flowing across said virgin reference cell and said matrix cell; and (e) a current generator means interconnecting the drain of said virgin reference cell and the supply voltage, for generating continuously a current which is constant when the voltage output by said voltage supply varies.

Claim 3

A circuit for sensing the virgin or written state of a matrix cell in MOS EPROM memories comprising: (a) at least one matrix cell; (b) a plurality of load means; (c) a virgin reference cell, said matrix cell and said virgin reference cell having their respective sources connected to ground, having their respective drains connected to a voltage supply through respective ones of said plurality of load means, and their respective gates mutually interconnected to one another and controlled by a selection voltage; (d) a differential amplifier having a first input and a second input respectively connected to said respective ones of said load means, said differential amplifier sensing the respective currents flowing across said virgin reference cell and said matrix cell; wherein said current generator means generates (i) a current which is linearly proportional to said voltage output of said voltage supply, for values of said voltage output in a range between the threshold voltage of said virgin reference cell and a preset voltage, and (ii) a constant current for values of said voltage output higher than said preset value.

Claim 4

A circuit for sensing the virgin or written state of a matrix cell in MOS EPROM memories comprising: (a) at least one matrix cell; (b) a plurality of load means; (c) a virgin reference cell, said matrix cell and said virgin reference cell having their respective sources connected to ground, having their respective drains connected to a voltage supply through respective ones of said plurality of load means, and their respective gates mutually interconnected to one another and controlled by a selection voltage; (d) a differential amplifier having a first input and a second input respectively connected to said respective ones of said load means, said differential amplifier sensing the respective currents flowing across said virgin reference cell and said matrix cell; wherein said current generator means generates (i) a current which is linearly proportional to said voltage output of said voltage supply, for values of said voltage output in a range between the threshold voltage of said virgin reference cell and a preset voltage, and (ii) a constant current for values of said voltage output higher than said preset value.

Claim 5

A circuit for sensing the virgin or written state of a matrix cell in MOS EPROM memories comprising: (a) at least one matrix cell; (b) a plurality of load means; (c) a virgin reference cell, said matrix cell and said virgin reference cell having their respective sources connected to ground, having their respective drains connected to a voltage supply through respective ones of said plurality of load means, and their respective gates mutually interconnected to one another and controlled by a selection voltage; (d) a differential amplifier having a first input and a second input respectively connected to said respective ones of said load means, said differential amplifier sensing the respective currents flowing across said virgin reference cell and said matrix cell; (e) a second virgin cell; (f) a current mirror; and (g) a constant voltage generator which drives said current mirror through said second virgin cell, said current mirror having an output interconnecting the drain of said virgin reference cell and the voltage supply, said current mirror generating at said output thereof an offset current which is constant when the voltage output by said voltage supply varies.

Claim 6

A circuit for sensing the virgin or written state of a matrix cell in MOS EPROM memories comprising: (a) at least one matrix cell; (b) a plurality of load means; (c) a virgin reference cell, said matrix cell and said virgin reference cell having their respective sources connected to ground, having their respective drains connected to a voltage supply through respective ones of said plurality of load means, and their respective gates mutually interconnected to one another and controlled by a selection voltage; (d) a differential amplifier having a first input and a second input respectively connected to said respective ones of said load means, said differential amplifier sensing the respective currents flowing across said virgin reference cell and said matrix cell; (e) a second virgin cell; (f) a current mirror; and (g) a constant voltage generator which drives said current mirror through said second virgin cell, said current mirror having an output interconnecting the drain of said virgin reference cell and the voltage supply, said current mirror generating at said output thereof an offset current which is constant when the voltage output by said voltage supply varies.