Patent US4943346A successfully refreshed from Google Patents.
US4943346A
Expired / Lapsed
US
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Method for manufacturing printed circuit boards
Assignee: Siemens AG
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Filing: 1989-09-01
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Granted: 1990-07-24
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Expires: 2009-09-01
Abstract
Abstract A method for manufacturing printed circuit boards has a double etch process to form interconnection wiring. A metal layer is formed on the substrate. An etch resist layer is applied to the metal layer. The layer is selectively removed to allow for selective etching of the metal layer. A second etch resist layer is applied to the metal layer not previously etched. The side walls of the metal layer are also protected by the resist. The second etch resist layer is then selectively removed to allow for a second etching of the metal layer. After the second etching, the interconnection wiring remains in the desired pattern. The second etch resist layer, which may be tin, can be left on the wiring to improve component soldering.
Inventors
- 👤 Antoon Mattelin
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 12:13
CPC Classifications
B; B44; B44C; B44C1/00; B44C1/22; C; C23; C23F; C23F1/00; C23F1/02; H; H05; H05K; H05K3/00; H05K3/02; H05K3/06; H05K3/061; H05K3/062; H05K3/07; B29; B29L; B29L2031/00; B29L2031/34; B29L2031/3493; H05K2201/00; H05K2201/03; H05K2201/0302; H05K2201/0305; H05K2201/09; H05K2201/09009; H05K2201/09118; H05K2201/09209; H05K2201/0929; H05K2201/09363; H05K2203/00; H05K2203/03; H05K2203/0361; H05K2203/07; H05K2203/0703; H05K2203/072; H05K2203/13; H05K2203/1333; H05K2203/135; H05K2203/14; H05K2203/1476; H05K3/0011; H05K3/0017; H05K3/0026; H05K3/0032; H05K3/027; Y; Y10; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49117; Y10T29/49124; Y10T29/49155; Y10T29/49165
Claims Analysis
Total Claims: 18
Claim 1
Independent Claim
137 words
A method for manufacturing printed circuit boards, comprising the steps of: generating a metal layer on an insulating substrate; applying a first etch resist layer onto said metal layer; selectively removing said etch resist layer so as to expose a first undesired region of said metal layer; completely etching said first undesired region away leaving a second undesired region of said metal layer and a desired region of said metal layer; applying a second etch resist layer onto said second undesired region and said desired region of said metal layer; selectively removing said second etch resist layer from said second undesired region of said metal layer; anodically contacting said second undesired region of said metal layer; and completely electrolytically etching said second undesired region away so as to leave said desired region of said metal layer remaining.
Claim 2
Independent Claim
137 words
A method for manufacturing printed circuit boards, comprising the steps of: generating a metal layer on an insulating substrate; applying a first etch resist layer onto said metal layer; selectively removing said etch resist layer so as to expose a first undesired region of said metal layer; completely etching said first undesired region away leaving a second undesired region of said metal layer and a desired region of said metal layer; applying a second etch resist layer onto said second undesired region and said desired region of said metal layer; selectively removing said second etch resist layer from said second undesired region of said metal layer; anodically contacting said second undesired region of said metal layer; and completely electrolytically etching said second undesired region away so as to leave said desired region of said metal layer remaining.
Claim 3
Dependent Claim
50 words
A method for manufacturing printed circuit board as claimed in claim 1, further comprising the steps of: staining said insulating substrate so that adhesion of said metal layer to said insulating substrate is improved; cleaning said substrate; and nucleating said insulating substrate so as to form a thin layer thereon.
Claim 4
Dependent Claim
24 words
A method for manufacturing printed circuit boards as claimed in claim 1, further comprising the step of: completely removing said first etch resist layer.
Claim 5
Dependent Claim
31 words
A method for manufacturing printed circuit boards, as claimed in claim 1, further comprising the step of: removing said second etch resist layer from said desired regions of said metal layer.
Claim 6
Dependent Claim
47 words
A method for manufacturing printed circuit boards, as claimed in claim 1, further comprising the steps of: tempering said insulating substrate and said desired regions of said metal layer; and applying a solder stop lacquer onto said insulating substrate and said desired regions of said metal layer.
Claim 7
Dependent Claim
30 words
A method for manufacturing printed circuit boards, as claimed in claim 1, wherein the step of generating a metal layer is further defined by: depositing a metal layer of copper.
Claim 8
Dependent Claim
33 words
A method for manufacturing printed circuit boards, as claimed in claim 1, wherein the step of generating a metal layer is further defined by: generating a metal layer by currentless and voltaic deposition.
Claim 9
Dependent Claim
38 words
A method for manufacturing printed circuit boards, as claimed in claim 1, wherein the step of applying a first etch resist layer is further defined by: applying a first etch resist layer of tin or a tin-lead alloy.
Claim 10
Dependent Claim
39 words
A method for manufacturing printed circuit boards, as claimed in claim 1, wherein the step of applying a second etch resist layer is further defined by: applying a second etch resist layer of tin or a tin lead alloy.
Claim 11
Dependent Claim
36 words
A method for manufacturing printed circuit boards, as claimed in claim 1, wherein the step of applying a first etch resist layer is further defined by: applying a first etch resist layer of an organic compound.
Claim 12
Dependent Claim
35 words
A method for manufacturing printed circuit boards, as claimed in claim 1, wherein the step of applying an etch resist layer is further defined by: applying a second etch resist layer of an organic compound.
Claim 13
Dependent Claim
52 words
A method for manufacturing printed circuit boards, as claimed in claim 1, wherein the step of applying a second etch resist layer is further defined by: applying a second etch resist layer onto a top surface and side walls of said second undesired region and said desired region of said metal layer.
Claim 14
Dependent Claim
46 words
A method for manufacturing printed circuit boards, as claimed in claim 1, wherein the step of selectively removing said first etch resist layer is further defined by: selectively removing said first etch resist layer by electromagnetic radiation generated by a laser whose movement is freely programmable.
Claim 15
Dependent Claim
40 words
A method for manufacturing printed circuit boards as claimed in claim 3, wherein the step of completely removing said first etch resist layer is further defined by: completely removing said first etch resist layer by dissolution in an electrolyte solution.
Claim 16
Dependent Claim
40 words
A method for manufacturing printed circuit boards, as claimed in claim 1, wherein the step of selectively removing said second etch resist layer is further defined by: selectively removing said second etch resist layer by dissolution in an electrolyte solution.
Claim 17
Dependent Claim
36 words
A method for manufacturing printed circuit boards, as claimed in claim 5, wherein the step of removing said second etch layer is further defined by: removing said second etch layer by dissolution in an electrolyte solution.
Claim 18
Dependent Claim
49 words
A method for manufacturing printed circuit boards, as claimed in claim 1, wherein the step of generating a metal layer is further defined by: generating a metal layer onto an insulating substrate having through-holes with inner walls, said inner walls are processed in the same fashion as said substrate.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1993-07-23 | 1994-01-22 | 1994-07-24 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1997-07-23 | 1998-01-22 | 1998-07-24 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2001-07-23 | 2002-01-22 | 2002-07-24 | $7700.00 | Window Closed / Lapsed |