Serial communications controller with FIFO register for storing supplemental data and counter for counting number of words within each transferred frame

Claim 1

Input/output control circuitry for a data communication system for receiving sequential frames of incoming data words, each frame having an end, and for transferring the data words to memory which is separate from the control circuitry, the control circuitry comprising: means for generating supplemental data to be read from the control circuitry, supplemental data being information which is different from but is associated with each frame of incoming data; means for counting the number of words within each frame to provide a word count; means comprising a first-in/first-out register (FIFO),coupled to the means for generating and the means for counting, for storing the supplemental data and the associated word counts with continued transfer of sequential frames of data to said memory, such that the supplemental data and word counts are available to be read from the control circuitry after transfer of the frame with which the supplemental data is associated; and control logic means responsive to said supplemental data for incrementing the first-in/first-out register at the end of each frame and for decrementing the first-in/first-out register as each set of supplemental data and associated word count is read and processed by a central processing unit.