← Back to Patent Explorer
US3855422A Expired / Lapsed US ⏱️ 0.0 years remaining

Time division multiplexer with each frame consisting of a fixed length bit oriented address field and a variable length character oriented data field

Assignee: International Business Machines Corp
•
Filing: 1973-07-05
•
Granted: 1974-12-17
•
Expires: 1993-07-05
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A device for demultiplexing and multiplexing data characters to and from a plurality of terminals utilizing a recurrent framing format, the format, in inverse order, consisting of a variable length character field; an address field in which each bit position designates a different terminal, the bit value in the position defining the presence of and order in the character field sequence of a character destined for that terminal; and a synch character. Thus, only one bit is needed to character address a terminal in any given frame.

Inventors

  • 👤 J Cadiou
  • 👤 G Guerinet
  • 👤 P Callens

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-25 13:18
CPC Classifications
H; H04; H04J; H04J3/00; H04J3/24; H04J3/242

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 294 words
A multiplexing device for controlling the transmission of data characters between a central station and selectively chosen ones of a plurality of terminal stations wherein: the data characters are multiplexed into frames containing not more than one character for each terminal station with each frame consisting of a frame identifying character, an address character identifying the terminal stations for which frame data characters are present in the frame and a variable number of data characters, said device including; a receiving and a transmitting shift register for each terminal, Means connecting each shift register to its associated terminal for data transfer, circuits for connecting all of said receiving shift registers into a serial train of shift registers, other circuits for connecting said transmitting shift registers into a second serial train of shift registers, a normally closed switch for each shift register to bypass said circuits around the associated register, a reception control unit to store the data in said address field as received from a central station, means in said reception control unit to open selected ones of said switches for said receiving shift registers in accordance with the data in a received address field, means in said reception control unit for thereafter passing received signals representing said variable length data field to said receiving shift registers having opened switches, means at each terminal to store signals representing a data character to be transmitted into its associated transmitting shift register and to open the corresponding switch for said shift register, and a transmission control unit activated by storage of a data character in one or more of said transmission shift registers to control transmission to said central unit of a frame of data including the characters stored in said transmitting shift registers having opened switches.
Claim 2
Dependent Claim 294 words
A multiplexing device for controlling the transmission of data characters between a central station and selectively chosen ones of a plurality of terminal stations wherein: the data characters are multiplexed into frames containing not more than one character for each terminal station with each frame consisting of a frame identifying character, an address character identifying the terminal stations for which frame data characters are present in the frame and a variable number of data characters, said device including; a receiving and a transmitting shift register for each terminal, Means connecting each shift register to its associated terminal for data transfer, circuits for connecting all of said receiving shift registers into a serial train of shift registers, other circuits for connecting said transmitting shift registers into a second serial train of shift registers, a normally closed switch for each shift register to bypass said circuits around the associated register, a reception control unit to store the data in said address field as received from a central station, means in said reception control unit to open selected ones of said switches for said receiving shift registers in accordance with the data in a received address field, means in said reception control unit for thereafter passing received signals representing said variable length data field to said receiving shift registers having opened switches, means at each terminal to store signals representing a data character to be transmitted into its associated transmitting shift register and to open the corresponding switch for said shift register, and a transmission control unit activated by storage of a data character in one or more of said transmission shift registers to control transmission to said central unit of a frame of data including the characters stored in said transmitting shift registers having opened switches.
Claim 3
Dependent Claim 65 words
A mutliplexing device as set out in claim 1, and including therewith, a data storage device for each receiving shift register, a gate to pass data stored in said shift register to said storage device, and gate control means activated by said reception control unit after reception of the last character signal of said variable number of data characters of the data frame being received.
Claim 4
Dependent Claim 83 words
A multiplexing device as set out in claim 1, and including therewith a transmit data storage device for each transmitting shift register, a transmission data gate circuit to pass data stored in said transmit data storage device to said transmit shift register, and a transmission data gate control circuit to energize said gate to pass data into said transmit shift register when data is stored in at least one of said transmit data storage devices and a previous data transmission has been terminated.

References Cited (Backward Citations)

US3597549A Cited
US3597549B1 Cited
US3732543A Cited
US3752932A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1977-12-16 1978-06-17 1978-12-17 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1981-12-16 1982-06-17 1982-12-17 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1985-12-16 1986-06-17 1986-12-17 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag