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US4937647A Expired / Lapsed US ⏱️ 0.0 years remaining

SCR-DMOS circuit for driving electroluminescent displays

Assignee: Texas Instruments Inc
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Filing: 1988-07-14
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Granted: 1990-06-26
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Expires: 2008-07-14
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Abstract

Abstract Disclosed is a small-area solid state driver (30) adapted for switching high voltages. The driver (30) includes a DMOS device (48) driving a bipolar SCR (58). A SCR NPN transistor (54) and PNP transistor (56) are parasitic in nature, thus reducing the wafer area of the driver (30). The SCR (58) provides current sink capabilities to the driver output (60). Current source capabilities are provided by a substrate input terminal (50) which is connected to the output (60) by diodes (84, 86). A third input (52) allows the SCR (58) to be disabled.

Inventors

  • 👤 Stephen L. Sutton

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 22:31
CPC Classifications
H; H03; H03K; H03K17/00; H03K17/51; H03K17/56; H03K17/567

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 190 words
A SCR-DMOS driver, comprising: a semiconductor substrate of first conductivity type having an input terminal; a semiconductor tank of second conductivity type formed on said substrate for defining a collector of a bipolar transistor of a first type and a base of a bipolar transistor of a second type and a drain region of a field effect transistor; a semiconductor well of first conductivity type formed within said tank for providing a high breakdown voltage and a conduction channel for said field effect transistor, said well defining a base of said first type transistor and a collector of said second type transistor, and a pinch resistor; a semiconductor region of second conductivity type formed in said well defining a source region for said field effect transistor and an emitter for said first type transistor; a gate terminal for said field effect transistor; a semiconductor region of first conductivity type formed in said tank for defining an emitter for said second type transistor and defining an output of the driver and; an isolation diffusion region of first conductivity type formed in the substrate laterally electrically isolating said driver in said substrate.
Claim 2
Dependent Claim 190 words
A SCR-DMOS driver, comprising: a semiconductor substrate of first conductivity type having an input terminal; a semiconductor tank of second conductivity type formed on said substrate for defining a collector of a bipolar transistor of a first type and a base of a bipolar transistor of a second type and a drain region of a field effect transistor; a semiconductor well of first conductivity type formed within said tank for providing a high breakdown voltage and a conduction channel for said field effect transistor, said well defining a base of said first type transistor and a collector of said second type transistor, and a pinch resistor; a semiconductor region of second conductivity type formed in said well defining a source region for said field effect transistor and an emitter for said first type transistor; a gate terminal for said field effect transistor; a semiconductor region of first conductivity type formed in said tank for defining an emitter for said second type transistor and defining an output of the driver and; an isolation diffusion region of first conductivity type formed in the substrate laterally electrically isolating said driver in said substrate.
Claim 3
Dependent Claim 34 words
The SCR-DMOS driver of claim 1 further including a semiconductor region of first conductivity type formed in said well and responsive to a voltage applied thereto for affecting the resistance of said pinch resistor.
Claim 4
Dependent Claim 36 words
The SCR-DMOS driver of claim 1 further including a semiconductor region of second conductivity type forming a junction with said semiconductor region of first conductivity type formed in said tank to thereby provide a Zener diode.
Claim 5
Dependent Claim 51 words
The SCR-DMOS driver of claim 1 further including a semiconductor region of second conductivity type formed between said substrate and said semiconductor tank and beneath said second type transistor so that a depletion region formed by a voltage applied to said subtrate input terminal does not reach said second type transistor.

References Cited (Backward Citations)

US4502070A Cited
US4456909A Cited
US4550332A Cited
US4605872A Cited
US4551643A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1993-06-25 1993-12-25 1994-06-26 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1997-06-25 1997-12-25 1998-06-26 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2001-06-25 2001-12-25 2002-06-26 $7700.00 Window Closed / Lapsed

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