US4935900A
Expired / Lapsed
US
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Dynamic random access memory with a self-refreshing function
Assignee: Panasonic Holdings Corp
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Filing: 1988-07-27
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Granted: 1990-06-19
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Expires: 2008-07-27
Abstract
Abstract A dynamic random access memory includes a self-refreshing function, in which an error correction device for detecting and correcting an error in the data of the memory cell during the refreshing operation of the memory cell data is provided. The clock period of a control clock generator for controlling the refreshing and error correcting operation is made variable. Specifically, the clock period of the clock generator is maintained in the vicinity of a maximum acceptable value dependant on the pause time of the memory cell in response to an error detection signal generated at the time of error correction by the error correction device. According to this configuration, if the phase time of the memory cell is changed significantly due to the manufacturing process condition the refreshing operation can be effected at a period near the maximum acceptable value, so that the self-refreshing current consumption may be decreased. Furthermore, if the phase time varies depending on the change in the operating condition or characteristic changes due to the time passage, the clock period values in response to such change, so that it is possible to operate in the maximum self-refreshing period depending on the conditions, without-resulting in a malfunction in the refreshing operation.
Inventors
- 👤 Akira Ohsawa
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 11:39
CPC Classifications
G; G11; G11C; G11C11/00; G11C11/21; G11C11/34; G11C11/39; G11C11/40; G11C11/401; G11C11/406
Claims Analysis
Total Claims: 15
Claim 1
Independent Claim
293 words
A dynanic random access memory with a self-refreshing function comprising: a memory cell matrix having a plurality of memory cells arranged in a matrix form having a plurality of rows and columns; row line selection circuit and column line selection circuit for selecting any one of the rows and columns of said memory cell matrix; a sense refreshing amplifier for reading out the data in the memory cells in said memory cell matrix selected by said row line selection circuit and for rewriting data into the same memory cells to effect refreshing of the memory cells; an error correction circuit for detecting and correcting an error in the data in a memory cell among said memory cells selected by said row line selection circuit and column line selection circuit; address counter means for storing the address of the row and column of a memory cell to be refreshed and corrected, and for supplying said row line selection circuit and said column line selection circuit with said address; a self-refreshing clock for generating self-refreshing clock pulses for determining a period of a refresh cycle to be executed repeatedly, wherein said period is variable; a control clock generator for receiving self-refreshing clock pulses from said self-refreshing clock generator, and for supplying a series of control clock pulses to said address counter means, row line selection circuit, column line selection circuit, sense refreshing amplifier and error correction circuit; and control means for controlling a clock period of said self-refreshing clock generator in response to an error detection signal delivered from said error correction circuit when said error correction circuit detects an error in the data in the memory cell among said memory cells selected by said row line selection circuit and said column line selection circuit.
Claim 2
Dependent Claim
293 words
A dynanic random access memory with a self-refreshing function comprising: a memory cell matrix having a plurality of memory cells arranged in a matrix form having a plurality of rows and columns; row line selection circuit and column line selection circuit for selecting any one of the rows and columns of said memory cell matrix; a sense refreshing amplifier for reading out the data in the memory cells in said memory cell matrix selected by said row line selection circuit and for rewriting data into the same memory cells to effect refreshing of the memory cells; an error correction circuit for detecting and correcting an error in the data in a memory cell among said memory cells selected by said row line selection circuit and column line selection circuit; address counter means for storing the address of the row and column of a memory cell to be refreshed and corrected, and for supplying said row line selection circuit and said column line selection circuit with said address; a self-refreshing clock for generating self-refreshing clock pulses for determining a period of a refresh cycle to be executed repeatedly, wherein said period is variable; a control clock generator for receiving self-refreshing clock pulses from said self-refreshing clock generator, and for supplying a series of control clock pulses to said address counter means, row line selection circuit, column line selection circuit, sense refreshing amplifier and error correction circuit; and control means for controlling a clock period of said self-refreshing clock generator in response to an error detection signal delivered from said error correction circuit when said error correction circuit detects an error in the data in the memory cell among said memory cells selected by said row line selection circuit and said column line selection circuit.
Claim 3
Dependent Claim
72 words
A dynamic random access memory with a self-refreshing function according to claim 1, wherein said control means controls the clock period of said self-refreshing clock generator so as to shorten the clock period of said self-refreshing clock generator every time said error detection signal is generated, and to increase the clock period of said self-refreshing clock generator in the absence of an error in the data for a predetermined period of time.
Claim 4
Dependent Claim
75 words
A dynamic random access memory with a self-refreshing function according to claim 1, wherein said control means contains a counter circuit which counts by the output signal coming out from said address counter means storing said column address and is reset by the error detection signal from said error correction circuit, and the clock period of said self-refreshing clock generator is varied by said error detection signal and the output signal of said counter circuit.
Claim 5
Dependent Claim
67 words
A dynamic random access memory with a self-refreshing function according to claim 3, wherein said self-refreshing clock generator is composed of a self-excited clock generation source, a dividing circuit for dividing the clock frequency from said clock generation source, and a dividing ratio control circuit for controlling the dividing ratio of said dividing circuit by said error detection signal and the output signal of said counter circuit.
Claim 6
Dependent Claim
53 words
A dynamic random access memory with a self-refreshing function according to claim 4, wherein the dividing ratio of the dividing circuit of said self-refreshing clock generator is increased every time said error detection signal is generated, and the dividing ratio of said dividing circuit is decreased by the output of said counter circuit.
Claim 7
Dependent Claim
53 words
A dynamic random access memory with a self-refreshing function according to claim 1, wherein said control means contains a timer circuit for generating an output at a predetermined timing, and the clock period of said self-refreshing clock generator is varied by said error detection signal and the output signal of said timer circuit.
Claim 8
Dependent Claim
66 words
A dynamic random access memory with a self-refreshing function according to claim 6, wherein said self-refreshing clock generator is composed of a self-exciting clock generation source, a dividing circuit for dividing the output from said clock generation source, and a dividing ratio control circuit for controlling the dividing ratio of said dividing circuit by said error detection signal and the output signal of said timer circuit.
Claim 9
Dependent Claim
54 words
A dynamic random access memory with a self-refreshing function according to claim 7, wherein the dividing ratio of the dividing circuit of said self-refreshing clock generator is increased every time said error detection signal is generated, and the dividing ratio of said dividing circuit is decreased by the output signal of said timer circuit.
Claim 10
Dependent Claim
132 words
A dynamic random access memory with a self-refreshing function comprising: a memory cell matrix having a plurality of memory cells arranged in a matrix form; refreshing means for reading and rewriting the data of memory cells in said memory cell matrix; error correction means for detecting and correcting an error in the data of said memory cell during operation of said refreshing means; clock generating means for generating clock pulses for determining a period of a refresh cycle to be executed repeatedly wherein said period is variable, and for supplying said refreshing means and error correction means with said clock pulses; and control means for controlling a period of said clock generating means in response to an error detection signal generated when said error correction means detects an error in the data.
Claim 11
Dependent Claim
132 words
A dynamic random access memory with a self-refreshing function comprising: a memory cell matrix having a plurality of memory cells arranged in a matrix form; refreshing means for reading and rewriting the data of memory cells in said memory cell matrix; error correction means for detecting and correcting an error in the data of said memory cell during operation of said refreshing means; clock generating means for generating clock pulses for determining a period of a refresh cycle to be executed repeatedly wherein said period is variable, and for supplying said refreshing means and error correction means with said clock pulses; and control means for controlling a period of said clock generating means in response to an error detection signal generated when said error correction means detects an error in the data.
Claim 12
Dependent Claim
72 words
A dynamic random access memory with a refreshing function according to claim 9, wherein said control means controls the clock period of said self-refreshing clock generator so as to shorten the clock period of said clock generating means every time said error detection signal is generated, and to increase the clock period of said clock generating means in the absence of an error in the data for a predetermined period of time.
Claim 13
Dependent Claim
125 words
A dynamic random access memory with a self-refreshing function comprising: a memory cell matrix having a plurality of memory cells arranged in a matrix form; refreshing means for reading and rewriting the data of memory cells in said memory cell matrix; error detection means for detecting an error in data in the memory cell during refreshing action by said refreshing means; clock generating means for generating clock pulses for determining a period of a refresh cycle to be executed repeatedly wherein said period is variable, and for supplying said refreshing means and error detection means with said clock pulses; and control means for controlling the clock period of said clock generating means in response to an error detection signal generated by said error detection means.
Claim 14
Dependent Claim
125 words
A dynamic random access memory with a self-refreshing function comprising: a memory cell matrix having a plurality of memory cells arranged in a matrix form; refreshing means for reading and rewriting the data of memory cells in said memory cell matrix; error detection means for detecting an error in data in the memory cell during refreshing action by said refreshing means; clock generating means for generating clock pulses for determining a period of a refresh cycle to be executed repeatedly wherein said period is variable, and for supplying said refreshing means and error detection means with said clock pulses; and control means for controlling the clock period of said clock generating means in response to an error detection signal generated by said error detection means.
Claim 15
Dependent Claim
72 words
A dynamic random access memory with a self-refreshing function according to claim 11, wherein said control means controls the clock period of said self-refreshing clock generator so as to shorten the clock period of said clock generating means every time said error detection signal is generated, and to increase the clock period of said clock generating means in the absence of an error in the data for a predetermined period of time.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1993-06-18 | 1993-12-18 | 1994-06-19 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1997-06-18 | 1997-12-18 | 1998-06-19 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2001-06-18 | 2001-12-18 | 2002-06-19 | $7700.00 | Window Closed / Lapsed |