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US4931985A Expired / Lapsed US ⏱️ 0.0 years remaining

Programmable sequencing device for controlling fast complex processes

Assignee: International Business Machines Corp
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Filing: 1988-03-21
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Granted: 1990-06-05
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Expires: 2008-03-21
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Abstract

Abstract Described is a sequencing device comprising a plurality of shift register stages, a plurality of switches and an output bus which couples the outputs from the shift register stages to inputs of the switches. Each shift register stage includes a data input port coupled to a selected switch, a clock input port coupled to a clock control signal line and a clear input port coupled to a clear control signal line. The sequencing device may be set in at least one of a plurality of states by external events that are provided as input signals to the sequencing device through input bus (10).

Inventors

  • 👤 Rene J. Glaise
  • 👤 Pierre Huon

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 09:31
CPC Classifications
G; G05; G05B; G05B19/00; G05B19/02; G05B19/04; G05B19/045; G05B19/07

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 264 words
A sequencing device which may be set into at least one selected state among a plurality of states, each state controlling the operation of a process in a machine, said selected state(s) depending upon external events which are provided as input signals to the sequencing device through an input bus (10), said device being characterized in that it comprises: an output bus (12), a number n of shift register stages (SR) equal to the number of states, each stage having a data input, a clock signal input, a clear input and an output which is coupled to the output bus, means (16) for providing a clock signal on the clock signal input, means (18) for providing a clear control signal on the clear input to reset the sequencing device, switching means (SW-1 to Sw-n) coupled to the input bus and to the output bus and having n output lines (14-1 to 14-n), each one of said lines is coupled to a corresponding data input of one shift register stage, said switching means being conditionally responsive to input signals of the input bus and to signals on the output bus selected as a function of a desired sequence of states for generating an active signal on at least one of said n output lines, which is provided to the corresponding data input of the shift register stage which provides an active signal on its output under control of the clock signal, whereby the state of the sequencing device is set as a function of the states of the input signals and of its previous state.
Claim 2
Dependent Claim 264 words
A sequencing device which may be set into at least one selected state among a plurality of states, each state controlling the operation of a process in a machine, said selected state(s) depending upon external events which are provided as input signals to the sequencing device through an input bus (10), said device being characterized in that it comprises: an output bus (12), a number n of shift register stages (SR) equal to the number of states, each stage having a data input, a clock signal input, a clear input and an output which is coupled to the output bus, means (16) for providing a clock signal on the clock signal input, means (18) for providing a clear control signal on the clear input to reset the sequencing device, switching means (SW-1 to Sw-n) coupled to the input bus and to the output bus and having n output lines (14-1 to 14-n), each one of said lines is coupled to a corresponding data input of one shift register stage, said switching means being conditionally responsive to input signals of the input bus and to signals on the output bus selected as a function of a desired sequence of states for generating an active signal on at least one of said n output lines, which is provided to the corresponding data input of the shift register stage which provides an active signal on its output under control of the clock signal, whereby the state of the sequencing device is set as a function of the states of the input signals and of its previous state.
Claim 3
Dependent Claim 37 words
Sequencing device according to claim 1, characterized in that the switching means comprise n logic arrangements, each one being conditioned by selected input signals of the input bus and by selected output signals of the output bus.
Claim 4
Dependent Claim 57 words
Sequencing device according to any one of claim 1 or 2, characterized in that one state of the sequencing device is an idle state indicated by a signal at the output of any stage dedicated to indicate this idle state, which becomes active in absence of external events or when none of the other stages is ON.

References Cited (Backward Citations)

US4021651A Cited
US3824378A Cited
US4142246A Cited
DE3106525A1 Cited
US4663730A Cited
US4575583A Cited
EP0187985A1 Cited
US4748552A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1993-06-04 1993-12-04 1994-06-05 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1997-06-04 1997-12-04 1998-06-05 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2001-06-04 2001-12-04 2002-06-05 $7700.00 Window Closed / Lapsed

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