Method and circuit arrangement to design a sequential controller by using a feedback memory

Abstract

Abstract In the course of this method, the desired states to be distinguished are first provided with state symbols and on the basis of these a state graph is recorded. The essence of the invention consists in that, after the states have been completely coded, the state graph is first used for determining the signals, the number of which corresponds to at least the number of states of the desired sequence controls according to the logarithm to the base of 2, after which the signals are fed back from the outputs of the memory to other address inputs with the exception of certain address inputs; in this manner, the number of address inputs of the memory and of the further feedback address inputs is determined, after which the states not utilised for the operation of the memory are weighted as transition states; accordingly, the circuit of the control circuit is recorded with all the outputs and inputs of the memory as determined in accordance with the timing diagram; the content of a cell of the memory is selected in such a manner that the code of the next state dependent on the address inputs and the other address inputs appears at the feedback outputs whilst at the non- feedback outputs the codes corresponding to the desired result signals are generated, after which the content of the memory is determined by the tabled coding of the functions corresponding to the task. The invention also relates to a circuit arrangement for designing a sequence control circuit by using a feedback memory, the memory of which has condition inputs and result outputs. The essence of the circuit arrangement consists in that the feedback outputs - the number of which corresponds to at least the number of desired sequence control in accordance with the logarithm to the base of 2 - apart from the condition inputs which are connected to the address inputs, are fed back to other address inputs, the number of which corresponds to the number of feedback outputs, and, furthermore, all outputs of the memory form the result outputs of the circuit arrangement. <IMAGE>

Inventors

• 👤 Gabor Dipl.-Elek. Halmi
• 👤 György VITEZ
• 👤 Pal Dipl.-Elek. Barta

Bibliographic Details