US4930216A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Process for preparing integrated circuit dies for mounting
Assignee: Samsung Electronics Co Ltd
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Filing: 1989-03-10
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Granted: 1990-06-05
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Expires: 2009-03-10
Abstract
Abstract Integrated circuit dies, while still in wafer form, are prepared for surface mounting direct to a substrate without requiring packaging. Holes are made through a wafer having a plurality of integrated circuit dies and are placed between the dies and adjacent the die pads. A layer of insulating material is placed on the wafer and in the outer periphery of the holes. An electrically conductive connection is made between the top of each pad and the inside of the insulating material in an adjacent hole. The dies are separated from each other and may be surface mounted to a substrate by soldering.
Inventors
- 👤 Bradley H. Nelson
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 18:33
CPC Classifications
H; H10; H10W; H10W72/00; H10W72/90; H10P; H10P54/00; H10W20/00; H10W20/40; H10W72/01; H10W72/019; H10W70/00; H10W70/01; H10W70/05; H10W70/60; H10W70/62; H10W70/65; H10W72/071; H10W72/073; H10W72/07351; H10W72/07354; H10W72/30; H10W72/341; H10W72/347; H10W72/351; H10W72/352; H10W72/50; H10W72/59; H10W72/921; H10W72/922; H10W72/941; H10W72/944; H10W90/00; H10W90/701; H10W90/731; H10W90/734; Y; Y10; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49117; Y10T29/49169; Y10T29/49204; Y10T29/49224; Y10T29/49789; Y10T29/4979; Y10T29/49792
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
107 words
A process for preparing integrated circuit dies for mounting on a substrate comprising, making holes through a wafer having a plurality of integrated circuit dies in which the dies include pads thereon connected to integrated circuits in the dies, said holes being placed between the dies and adjacent the pads, placing a layer of insulating material over the wafer and in the outer periphery of the holes, adding an electrically conductive connection between the top of each pad and the inside of the insulating material in an adjacent hole, and separating the plurality of dies from each other along lines extending through the holes between the dies.
Claim 2
Dependent Claim
107 words
A process for preparing integrated circuit dies for mounting on a substrate comprising, making holes through a wafer having a plurality of integrated circuit dies in which the dies include pads thereon connected to integrated circuits in the dies, said holes being placed between the dies and adjacent the pads, placing a layer of insulating material over the wafer and in the outer periphery of the holes, adding an electrically conductive connection between the top of each pad and the inside of the insulating material in an adjacent hole, and separating the plurality of dies from each other along lines extending through the holes between the dies.
Claim 3
Dependent Claim
27 words
The process of claim 1 including, connecting a die to a substrate by an electrical interconnection to the electrically conductive connection on the inside of the holes.
Claim 4
Dependent Claim
15 words
The process of claim 1 wherein the holes are placed between pads on adjacent dies.
Claim 5
Dependent Claim
25 words
The process of claim 1 wherein scribe lines are positioned on the wafer between adjacent dies and the holes are placed on the scribe lines.
Claim 6
Dependent Claim
115 words
A process for preparing integrated circuit dies for mounting on a substrate comprising, making holes through a wafer having a plurality of integrated circuit dies in which the dies include pads thereon connected to integrated circuits in the dies, said holes being placed between the dies and adjacent the pads, placing a layer of insulating material over the wafer and in the outer periphery of the holes, removing the insulating material from the top of the pads, adding a metal connection between the top of each pad and the inside of the insulating material in said adjacent hole, and separating the plurality of dies from each other along lines passing through holes between the dies.
Claim 7
Dependent Claim
115 words
A process for preparing integrated circuit dies for mounting on a substrate comprising, making holes through a wafer having a plurality of integrated circuit dies in which the dies include pads thereon connected to integrated circuits in the dies, said holes being placed between the dies and adjacent the pads, placing a layer of insulating material over the wafer and in the outer periphery of the holes, removing the insulating material from the top of the pads, adding a metal connection between the top of each pad and the inside of the insulating material in said adjacent hole, and separating the plurality of dies from each other along lines passing through holes between the dies.
Claim 8
Dependent Claim
26 words
The process of claim 5 including, connecting a die to a substrate by soldering the metal connections on the inside of the holes to the substrate.
Claim 9
Dependent Claim
15 words
The process of claim 5 wherein the holes are placed between pads on adjacent dies.
Claim 10
Dependent Claim
27 words
The process of claim 5 including placing a metal layer to the inner periphery of the insulating material in the holes prior to adding the metal connection.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1993-06-04 | 1993-12-04 | 1994-06-05 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1997-06-04 | 1997-12-04 | 1998-06-05 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2001-06-04 | 2001-12-04 | 2002-06-05 | $7700.00 | Window Closed / Lapsed |