CMOS signal threshold detector

Claim 2

A data recovery system comprising: first means for providing an input signal; an amplifier means for receiving and processing the signal; said processing including adjusting any common mode components associated in said signal, setting a reference baseline about which positive peaks and negative peaks of said signal are being measured and amplifying said signal; a maximum peak detecting means for detecting and storing first signal charges representative of the positive peaks of said input signal; a first circuit means coupled to said maximum peak detecting means, said first circuit means discharging said maximum peak detecting means at a rate which varies in accordance with the magnitude of the first signal charges; a minimum peak detecting means for detecting and storing second signal charges representative of the minimum peaks of said input signal; a second circuit means discharging said minimum peak detecting means at a rate which varies in accordance with the magnitude of said second signal charges; and a switched capacitive amplifier means for combining signals generated from the maximum and minimum peak detecting means and outputting an amplified signal-ended signal.

Claim 3

The data recovery system of claim 1 further including a second means for providing a reference signal; and a comparator means for comparing the reference signal and the single-ended signal and generating a control signal when the single-ended signal exceeds the reference signal.

Claim 4

A data recovery system comprising: first means for providing an input signal; an amplifier means for receiving and processing the signal; said processing including adjusting any common mode components associated in said signal, setting a reference baseline about which positive peaks and negative peaks of said signal are being measured and amplifying said signal; a maximum peak detecting means for detecting the positive peaks; a minimum peak detecting means for detecting the negative peaks; a switched capacitive amplifier means for combining signals generated from the maximum and minimum peak detecting means and outputting an amplified single-ended signal; a second means for providing a reference signal; a comparator means for comparing the reference signal and the single-ended signal and generating a control signal when the single-ended signal exceeds the reference signal; and a third circuit means for receiving the control signal and the input signal, and for outputting a signal representative of the data.

Claim 5

A data recovery system comprising: first means for providing an input signal; an amplifier means for receiving and processing the signal; said processing including adjusting any common mode components associated in said signal, setting a reference baseline about which positive peaks and negative peaks of said signal are being measured and amplifying said signal; a maximum peak detecting means for detecting the positive peaks; a minimum peak detecting means for detecting the negative peaks; a switched capacitive amplifier means for combining signals generated from the maximum and minimum peak detecting means and outputting an amplified single-ended signal; a second means for providing a reference signal; a comparator means for comparing the reference signal and the single-ended signal and generating a control signal when the single-ended signal exceeds the reference signal; and a third circuit means for receiving the control signal and the input signal, and for outputting a signal representative of the data.

Claim 6

The data recovery system of claim 1 wherein the amplifier means includes a differential precision gain amplifier.

Claim 7

A data recovery system comprising: first means for providing an input signal; a differential precision again amplifier means for receiving and processing the signal; said processing including adjusting any common mode components associated in said signal, setting a reference baseline about which positive peaks and negative peaks of said signal are being measured and amplifying said signal; said differential precision gain amplifier means including a differential amplifier having a positive input, a negative input and an output; a second means for setting a desired gain coupled to the positive terminal; a conductor interconnecting the output to the second means; a third means for setting a desired gain coupled to the negative terminal; and a fourth means for establishing a voltage reference baseline for said incoming signal coupled to the negative terminal of said differential amplifier; a maximum peak detecting means for detecting the positive peaks; a minimum peak detecting means for detecting the negative peaks; and a switched capacitive amplifier means for combining signals generated from the maximum and minimum peak detecting means and outputting an amplified single-ended signal.

Claim 8

A data recovery system comprising: first means for providing an input signal; a differential precision again amplifier means for receiving and processing the signal; said processing including adjusting any common mode components associated in said signal, setting a reference baseline about which positive peaks and negative peaks of said signal are being measured and amplifying said signal; said differential precision gain amplifier means including a differential amplifier having a positive input, a negative input and an output; a second means for setting a desired gain coupled to the positive terminal; a conductor interconnecting the output to the second means; a third means for setting a desired gain coupled to the negative terminal; and a fourth means for establishing a voltage reference baseline for said incoming signal coupled to the negative terminal of said differential amplifier; a maximum peak detecting means for detecting the positive peaks; a minimum peak detecting means for detecting the negative peaks; and a switched capacitive amplifier means for combining signals generated from the maximum and minimum peak detecting means and outputting an amplified single-ended signal.

Claim 9

The data recovery system of claim 5 wherein the second and third means include a first P-channel FET device having a drain electrode, a source electrode and a substrate electrode with the source electrode connected to the substrate electrode; a second P-channel FET device connected in parallel to the first P-channel FET device; said second P-channel FET device having a drain electrode, a substrate and source electrode connected to the substrate and source electrode of said first P-channel FET device; and a third P-channel FET device connected in series with the first and second P-channel FET device.

Claim 10

The data recovery system of claim 5 wherein the fourth means includes a pair of P-channel FET device connected in series with respective drain and source electrodes and each device having its gate and drain electrodes connected to a first node and its source and substrate electrodes connected to a second node.

Claim 11

A data recovery system comprising: first means for providing an input signal; an amplifier means for receiving and processing the signal; said processing including adjusting any common mode components associated in said signal, setting a reference baseline about which positive peaks and negative peaks of said signal are being measured and amplifying said signal; a maximum peak detecting means for detecting the positive peaks; said maximum peak detecting means including a differential amplifier having a positive input, a negative input and an output; a conductor means interconnecting the negative terminal to the output; a conductor means interconnecting the positive terminal to a first reference level; a storage means; a circuit means connected in parallel with the storage means and operable for discharging the storage means at a rate that is proportional to the charge thereon; a minimum peak detecting means for detecting the negative peaks; and a switched capacitive amplifier means for combining signals generated from the maximum and minimum peak detecting means and outputting an amplified single-ended signal.

Claim 12

A data recovery system comprising: first means for providing an input signal; an amplifier means for receiving and processing the signal; said processing including adjusting any common mode components associated in said signal, setting a reference baseline about which positive peaks and negative peaks of said signal are being measured and amplifying said signal; a maximum peak detecting means for detecting the positive peaks; said maximum peak detecting means including a differential amplifier having a positive input, a negative input and an output; a conductor means interconnecting the negative terminal to the output; a conductor means interconnecting the positive terminal to a first reference level; a storage means; a circuit means connected in parallel with the storage means and operable for discharging the storage means at a rate that is proportional to the charge thereon; a minimum peak detecting means for detecting the negative peaks; and a switched capacitive amplifier means for combining signals generated from the maximum and minimum peak detecting means and outputting an amplified single-ended signal.

Claim 13

The data recovery system of claim 8 wherein the storage means is a capacitor.

Claim 14

The data recovery system of claim 9 wherein the circuit means includes two series connected P-channel transistors.

Claim 15

A data recovery system comprising: first means for providing an input signal; an amplifier means for receiving and processing the signal; said processing including adjusting any common node components associated in said signal, setting a reference baseline about which positive peaks and negative peaks of said signal are being measured and amplifying said signal; a maximum peak detecting means for detecting the positive peaks; a minimum peak detecting means for detecting the negative peaks; said minimum peak detecting means including a differential amplifier having a positive input terminal, a negative input terminal and an output; a conductor means interconnecting the positive terminal to a first reference level; a P-channel FET device coupled to the output of the differential amplifier; a storage means coupled to the P-channel FET; and a discharge circuit means coupled in parallel with the storage means and operable for discharging the storage means at a rate proportional to the charge thereon; and a switched capacitive amplifier means for combining signals generated from the maximum and minimum peak detecting means and outputting an amplified single-ended signal.

Claim 16

A data recovery system comprising: first means for providing an input signal; an amplifier means for receiving and processing the signal; said processing including adjusting any common node components associated in said signal, setting a reference baseline about which positive peaks and negative peaks of said signal are being measured and amplifying said signal; a maximum peak detecting means for detecting the positive peaks; a minimum peak detecting means for detecting the negative peaks; said minimum peak detecting means including a differential amplifier having a positive input terminal, a negative input terminal and an output; a conductor means interconnecting the positive terminal to a first reference level; a P-channel FET device coupled to the output of the differential amplifier; a storage means coupled to the P-channel FET; and a discharge circuit means coupled in parallel with the storage means and operable for discharging the storage means at a rate proportional to the charge thereon; and a switched capacitive amplifier means for combining signals generated from the maximum and minimum peak detecting means and outputting an amplified single-ended signal.

Claim 17

A data recovery system for recovering data from a LAN comprising: a signal magnitude detector subsystem means for receiving a data signal from said LAN, for adjusting all common mode components associated with said data signal for measuring the maximum peaks and minimum peaks of signals referenced to a baseline set at center of said data signal and to output a first signal representative of the difference between the maximum and minimum peaks of said data signal; a comparator means for comparing a reference signal and the first signal to generate a control signal; and an amplifier means for receiving the data signal and outputting an amplified data signal; and a logical "AND" circuit for combining the amplified data signal and the control signal and to output a second signal representative of data.

Claim 18

A data recovery system for recovering data from a LAN comprising: a signal magnitude detector subsystem means for receiving a data signal from said LAN, for adjusting all common mode components associated with said data signal for measuring the maximum peaks and minimum peaks of signals referenced to a baseline set at center of said data signal and to output a first signal representative of the difference between the maximum and minimum peaks of said data signal; a comparator means for comparing a reference signal and the first signal to generate a control signal; and an amplifier means for receiving the data signal and outputting an amplified data signal; and a logical "AND" circuit for combining the amplified data signal and the control signal and to output a second signal representative of data.

Claim 19

An improved peak-to-peak detector for quantifying a signal received from a data channel comprising in combination: a differential precision gain circuit arrangement for receiving and amplifying the signal; a maximum peak detector circuit arrangement coupled to the differential precision gain amplifier; a first means coupled to the maximum peak detector for discharging the peak detector at a variable rate thereby rejecting high level components of the signal; a minimum peak detector coupled in parallel with the maximum peak detector and in series with the differential precision gain circuit; a second means coupled to the minimum peak detector for discharging at a variable rate the peak detector thereby rejecting low level components of the signal; and a switched capacitor amplifier coupled to the maximum and minimum peak detectors; said switched capacitor amplifier converting signals outputted from the maximum and minimum peak detectors into a single-ended signal;

Claim 20

An improved peak-to-peak detector for quantifying a signal received from a data channel comprising in combination: a differential precision gain circuit arrangement for receiving and amplifying the signal; a maximum peak detector circuit arrangement coupled to the differential precision gain amplifier; a first means coupled to the maximum peak detector for discharging the peak detector at a variable rate thereby rejecting high level components of the signal; a minimum peak detector coupled in parallel with the maximum peak detector and in series with the differential precision gain circuit; a second means coupled to the minimum peak detector for discharging at a variable rate the peak detector thereby rejecting low level components of the signal; and a switched capacitor amplifier coupled to the maximum and minimum peak detectors; said switched capacitor amplifier converting signals outputted from the maximum and minimum peak detectors into a single-ended signal;