Circuit arrangement for evaluating a video synchronizing signal
Abstract
Abstract A circuit arrangement for evaluating a video synchronizing signal formed by line synchronizing pulses whose regular sequence between two fields is interrupted by a field synchronizing pulse and the time interval between the edges of a field synchronizing signal and the edges of a subsequent first line synchronizing pulse is characteristic of each field. In the circuit arrangement the evaluation of the video synchronizing signal is based on a field synchronizing pulse and the line synchronizing pulses subsequent thereto. This evaluation is effected by a detector, which detects the field synchronizing pulses in the video synchronizing signal. The circuit arrangement, a first logic circuit which is connected to the output of the detector and which the operation of a first counter clocked by an oscillator is controlled, two decoders connected to the counting stages of the first counter and supplying an output pulse, as long as the counter position cycles throug a predetermined counting range for each decoder, and a second logic circuit connected to the decoders. Also the video synchronizing signal is applied to this logic circuit. From their output variables it cna be recognized whether one of the two decoders and which one of the two decoders has supplied an output pulse during a pulse in the video synchronizing signal.
Inventors
- 👤 Maximilian Riegel
Bibliographic Details
Claims Analysis
Total Claims: 4References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1993-04-30 | 1993-10-30 | 1994-05-01 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1997-04-30 | 1997-10-30 | 1998-05-01 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2001-04-30 | 2001-10-30 | 2002-05-01 | $7700.00 | Window Closed / Lapsed |