Patent US4920405A successfully refreshed from Google Patents.
← Back to Patent Explorer
US4920405A Expired / Lapsed US ⏱️ 0.0 years remaining

Overcurrent limiting semiconductor device

Assignee: Fuji Electric Co Ltd
•
Filing: 1987-11-25
•
Granted: 1990-04-24
•
Expires: 2007-11-25
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract An overcurrent limiting semiconductor device is provided comprising: a package having a base plate, sidewalls and a cover plate, at least one transistor fixed onto the base plate, terminal conductors respectively connected to the base, emitter and collector electrodes of the transistor which are led out through the cover plate, and a plurality of diode connected in series across the base/emitter of the transistor, with the diodes being disposed in a space provided between the cover plate and the base plate of the package, and connected to the base and emitter terminal conductors. This construction provides an integral overcurrent limiting semiconductor device which minimizes unnecessary limiting of the transistor collector-emitter current caused by a heating of the diodes by the transistor.

Inventors

  • 👤 Shinichi Itoh
  • 👤 Hisao Shigekane

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-04 19:06
CPC Classifications
H; H10; H10W; H10W90/00

Claims Analysis

Total Claims: 12
Claim 1
Independent Claim 148 words
An overcurrent limiting semiconductor device comprising: a package formed with a base plate, sidewalls and a cover plate; at least one transistor fixed onto said base plate; an encapsulation layer comprising a first resin layer formed on said base plate and a second resin layer formed on said first resin layer, said first resin layer and said second resin layer being made of different materials; terminal conductors respectively connected to the base, emitter and collector electrodes of said transistor, and being led out through the cover plate; and, a plurality of diodes electrically connected in series across base and emitter terminal conductors of said transistor, said being located in a space provided between said cover plate and said base plate of said package and being connected to the base and emitter terminal conductor of said transistor, said diodes comprising overcurrent limiting diodes enclosed in said second resin layer.
Claim 2
Dependent Claim 148 words
An overcurrent limiting semiconductor device comprising: a package formed with a base plate, sidewalls and a cover plate; at least one transistor fixed onto said base plate; an encapsulation layer comprising a first resin layer formed on said base plate and a second resin layer formed on said first resin layer, said first resin layer and said second resin layer being made of different materials; terminal conductors respectively connected to the base, emitter and collector electrodes of said transistor, and being led out through the cover plate; and, a plurality of diodes electrically connected in series across base and emitter terminal conductors of said transistor, said being located in a space provided between said cover plate and said base plate of said package and being connected to the base and emitter terminal conductor of said transistor, said diodes comprising overcurrent limiting diodes enclosed in said second resin layer.
Claim 3
Dependent Claim 35 words
An overcurrent limiting semiconductor device as claimed in claim 1, wherein said diodes are lead-mount type diodes, which are connected to each other and to the base and emitter terminal conductors by means of leads.
Claim 4
Dependent Claim 32 words
An overcurrent limiting semiconductor device as claimed in claim 1, wherein said diodes are positioned in parallel and in close proximity to each other and electrical leads interconnecting said diodes are bent.
Claim 5
Dependent Claim 18 words
An overcurrent limiting semiconductor device as claimed in claim 3, wherein said diodes are in a side-touching relationship.
Claim 6
Dependent Claim 18 words
An overcurrent limiting semiconductor device as claimed in claim 2, further comprising means for holding said diodes together.
Claim 7
Dependent Claim 19 words
An overcurrent limiting semiconductor device as claimed in claim 5, wherein said holding means is a heat shrinkable tubing.
Claim 8
Dependent Claim 32 words
An overcurrent limiting semiconductor device as claimed in claim 2, wherein said diodes are positioned in parallel and in close proximity to each other and electrical leads interconnecting said diodes are bent.
Claim 9
Dependent Claim 31 words
An overcurrent limiting semiconductor device as claimed in claim 1, wherein said diodes positioned in parallel and in close proximity to each other and electrical leads interconnecting said diodes are bent.
Claim 10
Dependent Claim 49 words
An overcurrent limiting semiconductor device as claimed in claim 1, wherein said diodes are in the form of a plurality of stacked and serially connected diode chips, which are commonly encapsulated and connected to the base and emitter terminal conductors by means of leads extending out of the encapsulation.
Claim 11
Dependent Claim 21 words
An overcurrent limiting semiconductor device as claimed in claim 1, wherein said transistor is in the form of a transistor chip.
Claim 12
Dependent Claim 27 words
An overcurrent limiting semiconductor device according to claim 1, wherein said first resin layer is made of silicon and said second resin layer is made of epoxy.

References Cited (Backward Citations)

US2817048A Cited
US3179855A Cited
US3575678A Cited
US3715633A Cited
US3784725A Cited
US4430664A Cited
JPS5881313A Cited
US4639759A Cited
JPS59215762A Cited
JPS59229849A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1993-04-23 1993-10-23 1994-04-24 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1997-04-23 1997-10-23 1998-04-24 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2001-04-23 2001-10-23 2002-04-24 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag