Image rotation circuit

Claim 2

An image rotation circuit for rotating a block of data representing at least a portion of am image, comprising: (a) a first-in-first-out (FIFO) memory, for storing the block of data as a sequence of data words, each word having a plurality of bits, the FIFO having an input and an output, (b) feedback means for connecting the output of the FIFO back to the input of the FIFO with a displacement of one bit position in a predetermined direction, to form a spiral serial data path, passing through all the bits in the FIFO, (c) means connected to one bit position of the output of the FIFO for serially reading data bits from the spiral serial data path, one bit at a time, and (d) output means for assembling the bits read from the spiral serial data path into output parallel data words.

Claim 3

A circuit according to claim 1 wherein said feedback means is selectively operable to displace each word by one bit position in either of two opposite directions.

Claim 4

A circuit according to claim 1 wherein said feedback means comprises a multiplexer having an output connected to the input of the FIFO, and having three inputs respectively connected to: (i) a data bus, (ii) the output of the FIFO, with a displacement of one bit position in a first direction, and (ii) the output of the FIFO, with a displacement of one bit position in a second direction.

Claim 5

A circuit according to claim 1 wherein said output means comprises a shift register.

Claim 6

Image display apparatus comprising: (a) an image memory holding a plurality of data words, each word comprising a plurality of bits, each bit representing a display value for a picture element of the image, (b) a first-in-first-out memory (FIFO) having an input and an output, (c) means for reading a sequence of data words from the image memory into the FIFO, (d) feedback means for connecting the output of the FIFO with a displacement of one bit position in a predetermined direction, to form a spiral data path, passing through all the bits in the FIFO, (e) means connected to one bit position of the output of the FIFO for serially reading data from the spiral serial data path, one bit at a time, (f) output means for assembling the bits read from the spiral serial data path into output parallel data words, and (g) means for writing the output parallel data words into the image memory.

Claim 7

Image display apparatus comprising: (a) an image memory holding a plurality of data words, each word comprising a plurality of bits, each bit representing a display value for a picture element of the image, (b) a first-in-first-out memory (FIFO) having an input and an output, (c) means for reading a sequence of data words from the image memory into the FIFO, (d) feedback means for connecting the output of the FIFO with a displacement of one bit position in a predetermined direction, to form a spiral data path, passing through all the bits in the FIFO, (e) means connected to one bit position of the output of the FIFO for serially reading data from the spiral serial data path, one bit at a time, (f) output means for assembling the bits read from the spiral serial data path into output parallel data words, and (g) means for writing the output parallel data words into the image memory.