Timing and supply bias circuit using one capacitor

Claim 2

A supply bias circuit for logic circuitry comprising: supply means for receiving a source voltage; terminal means for connecting to a capacitor; timing means, having an input coupled to said terminal means, for controlling at what time said capacitor is charged and discharged; first resistor means, coupled between said supply means and said terminal means, for receiving supply current from said supply means and for forming with said capacitor a low pass filter to prevent transient signals from shutting off the current to said logic circuitry; and second resistor means, coupled to said first resistor means, for providing current received from said first resistor means to said logic circuitry.

Claim 3

The circuit of claim 1 wherein said timing means comprises a comparator having a second input connected to receive a reference signal which alternates between a lower threshold and an upper threshold.

Claim 4

The circuit of claim 1 wherein said logic circuitry is coupled to said timing means such that when said capacitor discharges, extra current is fed into said logic circuitry.

Claim 5

The circuit of claim 1 wherein said supply means further includes means for regulating said source voltage.

Claim 6

The circuit of claim 1 further comprising a diode connected between said second resistor means and said logic circuitry, said diode providing a path for current from said second resistor means into said logic circuitry.

Claim 7

The circuit of claim 5 further comprising a plurality of transistors connected in parallel with said diode so as to mirror the current passing through said diode.

Claim 8

A supply bias circuit for logic circuitry comprising: supply means for receiving a source voltage; terminal means for connecting to a capacitor; a switching transistor having an input terminal, and a control terminal; comparator means, having an input coupled to said terminal means and the input terminal of said switching transistor and having an output coupled to the control terminal of said switching transistor, for turning said switching transistor off and on to charge and discharge said capacitor; first resistor means coupled between said supply means and said terminal means, for receiving supply current from said supply means and for forming with said capacitor a low pass filter to prevent transient signals from shutting off the current to said logic circuitry; and second resistor means, coupled to said first resistor means, for providing current received from said first resistor means to said logic circuitry.

Claim 9

A supply bias circuit for logic circuitry comprising: supply means for receiving a source voltage; terminal means for connecting to a capacitor; a switching transistor having an input terminal, and a control terminal; comparator means, having an input coupled to said terminal means and the input terminal of said switching transistor and having an output coupled to the control terminal of said switching transistor, for turning said switching transistor off and on to charge and discharge said capacitor; first resistor means coupled between said supply means and said terminal means, for receiving supply current from said supply means and for forming with said capacitor a low pass filter to prevent transient signals from shutting off the current to said logic circuitry; and second resistor means, coupled to said first resistor means, for providing current received from said first resistor means to said logic circuitry.

Claim 10

The circuit of claim 7 wherein said logic circuitry is coupled to an output terminal of said switching transistor such that when said capacitor discharges, extra current is fed into said logic circuitry.

Claim 11

The circuit of claim 7 wherein said supply means further includes means for regulating said source voltage.

Claim 12

The circuit of claim 7 further comprising a diode connected between said second resistor means and said logic circuitry, said diode providing a path for current from said second resistor means into said logic circuitry.

Claim 13

The circuit of claim 10 further comprising a plurality of transistors connected in parallel with said diode so as to mirror the current passing through said diode.

Claim 14

A supply bias circuit for logic circuitry comprising: supply means for receiving a source voltage; terminal means for connecting to a capacitor; a switching transistor having an input terminal, an output terminal and a control terminal; comparator means, having an input coupled to said terminal means and the input terminal of said switching transistor and having an output coupled to the control terminal of said switching transistor, for turning said switching transistor off and on to charge and discharge said capacitor; first resistor means, coupled between said supply means and said terminal means, for receiving supply current from said supply means; and said logic circuitry being coupled to the output terminal of said switching transistor such that when said capacitor discharges, discharge current is fed into said logic circuitry.

Claim 15

A supply bias circuit for logic circuitry comprising: supply means for receiving a source voltage; terminal means for connecting to a capacitor; a switching transistor having an input terminal, an output terminal and a control terminal; comparator means, having an input coupled to said terminal means and the input terminal of said switching transistor and having an output coupled to the control terminal of said switching transistor, for turning said switching transistor off and on to charge and discharge said capacitor; first resistor means, coupled between said supply means and said terminal means, for receiving supply current from said supply means; and said logic circuitry being coupled to the output terminal of said switching transistor such that when said capacitor discharges, discharge current is fed into said logic circuitry.

Claim 16

The circuit of claim 12 wherein said supply means further includes means for regulating said source voltage.

Claim 17

The circuit of claim 12 further comprising a diode coupled between said input of said comparator and said logic circuitry, said diode providing a path for current from said input of said comparator into said logic circuitry.

Claim 18

The circuit of claim 14 further comprising a plurality of transistors connected in parallel with said diode so as to mirror the current passing through said diode.