Patent US4912434A successfully refreshed from Google Patents.
US4912434A
Expired / Lapsed
US
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Digital control for analog phase locked loop
Assignee: Honeywell Inc
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Filing: 1989-02-27
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Granted: 1990-03-27
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Expires: 2009-02-27
Abstract
Abstract A phase locked loop including a digital control is provided. A phase detector having first and second inputs and an output connected to a loop filter which responds to the digital control so as to modify the output. The loop filter further comprises apparatus for integrating and a first apparatus for amplifying the modified phase detector output, each of which provides an output signal. An apparatus for digitally controlling the loop filter parameters responds to externally generated digital commands so as to vary loop parameters. A first apparatus for generating a voltage controlled oscillation signal is connected to the first input, where the voltage controlled oscillation apparatus includes a voltage control signal input. Further included is a second apparatus for generating a voltage control signal responsive to the sum of the output signals of the integrating apparatus and first amplifying apparatus, where the second generating apparatus transmits the voltage control signal to the voltage control signal input of the first generating apparatus so as to control the oscillation frequency. In one embodiment of the invention, the digital control apparatus comprises a digital-to-analog converter which responds to externally generated digital signals to provide a variable resistance so as to correspondingly change the natural frequency and damping of the phase locked loop in response to the external digital signals.
Inventors
- 👤 Michael A. Wyatt
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 13:05
CPC Classifications
H; H03; H03L; H03L7/00; H03L7/06; H03L7/08; H03L7/10; H03L7/107; H03L7/1075
Claims Analysis
Total Claims: 16
Claim 1
Independent Claim
133 words
A phase locked loop comprising: a phase detector having first and second inputs and an output; a means for digitally controlling the natural frequency and damping characteristics as applied to the phase detector output to modify the phase detector output; a loop filter having a natural frequency and damping characteristic further comprising a means for integrating and a first means for amplifying the modified phase detector output; a first means for generating a voltage controlled oscillation signal to the first input, where the voltage controlled oscillation means includes means for inputting a voltage control signal; and a second means for generating the voltage control signal responsive to the sum of the output signals of the integrating means and first amplifying means so as to control the frequency of the voltage controlled oscillation signal.
Claim 2
Dependent Claim
133 words
A phase locked loop comprising: a phase detector having first and second inputs and an output; a means for digitally controlling the natural frequency and damping characteristics as applied to the phase detector output to modify the phase detector output; a loop filter having a natural frequency and damping characteristic further comprising a means for integrating and a first means for amplifying the modified phase detector output; a first means for generating a voltage controlled oscillation signal to the first input, where the voltage controlled oscillation means includes means for inputting a voltage control signal; and a second means for generating the voltage control signal responsive to the sum of the output signals of the integrating means and first amplifying means so as to control the frequency of the voltage controlled oscillation signal.
Claim 3
Dependent Claim
46 words
The apparatus of claim 1 wherein the digital control means comprises a digital-to-analog converter which responds to externally generated signals to provide a variable resistance so as to correspondingly change the natural frequency and damping of the phase locked loop in response to the external signals.
Claim 4
Dependent Claim
19 words
The apparatus of claim 2 wherein the integration means further comprises a second means for amplifying having capacitive feedback.
Claim 5
Dependent Claim
18 words
The apparatus of claim 3 wherein the integration means further comprises a means for resetting the feedback capacitance.
Claim 6
Dependent Claim
18 words
The apparatus of claim 4 wherein the first amplifier means comprises an operational amplifier having feedback gain resistors.
Claim 7
Dependent Claim
14 words
The apparatus of claim 5 wherein the second generating means comprises an operational amplifier.
Claim 8
Dependent Claim
19 words
The apparatus of claim 4 wherein the reset means comprises an FET connected in parallel with the capacitive feedback.
Claim 9
Dependent Claim
131 words
A control for a phase locked loop including a phase detector having an output and first and second inputs and further including a voltage controlled oscillator having a control signal input and a signal output connected to a second input of the phase detector where the control comprises: means for providing first and second variable resistances so as to control the natural frequency and damping of the loop in response to external control signals; means for integrating the detector output connected through the first variable resistance means; first means for amplifying the detector output connected through the second variable resistance means; and means for generating a voltage control signal responsive to the phase detector output by responding the sum of the output signals of the integrating means and first amplifying means.
Claim 10
Dependent Claim
131 words
A control for a phase locked loop including a phase detector having an output and first and second inputs and further including a voltage controlled oscillator having a control signal input and a signal output connected to a second input of the phase detector where the control comprises: means for providing first and second variable resistances so as to control the natural frequency and damping of the loop in response to external control signals; means for integrating the detector output connected through the first variable resistance means; first means for amplifying the detector output connected through the second variable resistance means; and means for generating a voltage control signal responsive to the phase detector output by responding the sum of the output signals of the integrating means and first amplifying means.
Claim 11
Dependent Claim
46 words
The apparatus of claim 8 wherein the variable resistance means comprises a digital-to-analog converter which responds to externally generated signals to provide a variable resistance so as to correspondingly change the natural frequency and damping of the phase locked loop in response to the external signals.
Claim 12
Dependent Claim
19 words
The apparatus of claim 9 wherein the integration means further comprises a second means for amplifying having capacitive feedback.
Claim 13
Dependent Claim
18 words
The apparatus of claim 10 wherein the integration means further comprises a means for resetting the feedback capacitance.
Claim 14
Dependent Claim
19 words
The apparatus of claim 11 wherein the first amplifier means comprises an operational amplifier having feedback and gain resistors.
Claim 15
Dependent Claim
13 words
The apparatus of claim 12 wherein the generating means comprises an operational amplifier.
Claim 16
Dependent Claim
19 words
The apparatus of claim 13 wherein the reset means comprises an FET connected in parallel with the capacitive feedback.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1993-03-26 | 1993-09-25 | 1994-03-27 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1997-03-26 | 1997-09-25 | 1998-03-27 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2001-03-26 | 2001-09-25 | 2002-03-27 | $7700.00 | Window Closed / Lapsed |