Third order PLL with increased high frequency gain

Claim 1

A phase-locked loop comprising: an oscillator providing a reference signal, a voltage controlled oscillator (VCO) providing a variable signal, means for comparing the phases of the reference and variable signals to produce a difference signal at an output thereof, and first and second amplifiers connected in series between the output of said phase comparing means and a frequency controlling input of said VCO, operative to provide decreasing loop gain with increasing frequency at the rate of about 18 db per octave within a bandwidth of the loop, said first amplifier having a first input connected to said output of said phase comparing means, and an output connected in a feedback circuit comprising a first capacitor to a second input to said first amplifier, said second amplifier having a first input connected to said output of said first amplifier, and an output connected to said input to said VCO and connected in a feedback circuit comprising a second capacitor to a second input to said second amplifier; and further comprising feedback resistor means operative in combination with said amplifiers and said capacitors for providing said decreasing loop gain, said resistor means including a first resistor interconnecting said output of the second amplifier and said second input of the first amplifier.