Method of fabricating a semiconductor device

Claim 1

A method for fabricating a semiconductor device containing first and second MOSFETs and first and second bipolar transistors in a first conductivity-type silicon substrate, comprising the steps of: (a) implanting second conductivity-type ions into predetermined regions of said substrate and activating the implanted said predetermined regions so as to form a first region for said first MOSFET, a third region for said first bipolar transistor, and a fourth region for said second bipolar transistor; (b) forming element-isolation oxide thin film layers between elements of said transistors so as to isolate said elements from each other on said substrate, and forming first conductivity-type channel stopper regions below said oxide layers; (c) forming a first oxide thin film layer for gates of said first and second MOSFETs on an upper surface of said substrate; (d) forming said gates of said first and second MOSFETs by depositing and doping a first layer of polycrystalline semiconducting material over said first oxide thin film layer in said first region and a second region; (e) depositing a nitride thin film layer for masking on a whole upper surface of said substrate and removing said nitride layer from predetermined portions of said substrate; (f) etching said first oxide layer of predetermined portions of said third and fourth regions and implanting first conductivity-type ions into the etched portions so as to form inactive base regions of said first and second bipolar transistors; (g) forming second oxide thin film layers on said third and fourth regions of said substrate by employing said nitride layer as a mask; (h) implanting first conductivity-type ions into predetermined portions of said third and fourth regions of said substrate to form active base regions of said first and second bipolar transistors; (i) implanting second conductivity-type ions to form low concentration drain and source regions of said second MOSFET; (j) forming a third oxide thin-film layer on the whole surface of said substrate and etching said oxide layer without any separate mask so as to form oxide-layer spacers on sidewalls of the gates of said first and second MOSFETs; (k) implanting second conductivity-type ions to form a substrate connecting region of said first MOSFET of said first region, a collector connecting region of said third and fourth regions, an emitter region of said second bipolar transistor, and high concentration drain and source regions of said second MOSFET; (l) implanting first conductivity-type ions so as to form drain and source regions of said first MOSFET of said first region and a substrate connecting region of said second MOSFET of said second region; (m) forming a fourth oxide thin film layer on the whole surface of said substrate and making an emitter connecting window of said first bipolar transistor; (n) forming an emitter connecting portion of said first bipolar transistor with a second polycrystalline layer on the upper portion of said third region; (o) making windows for connecting with the drain and source regions of said first and second MOSFETs, the emitter, base and collector region of said first and second bipolar transistors, and the substrate connecting regions of said first and second MOSFETs; (p) making connections with a conduction layer through said windows; and (q) depositing a protecting layer on the whole surface of said substrate and then exposing a pad for wire-welding.

Claim 2

A method for fabricating a semiconductor device containing first and second MOSFETs and first and second bipolar transistors in a first conductivity-type silicon substrate, comprising the steps of: (a) implanting second conductivity-type ions into predetermined regions of said substrate and activating the implanted said predetermined regions so as to form a first region for said first MOSFET, a third region for said first bipolar transistor, and a fourth region for said second bipolar transistor; (b) forming element-isolation oxide thin film layers between elements of said transistors so as to isolate said elements from each other on said substrate, and forming first conductivity-type channel stopper regions below said oxide layers; (c) forming a first oxide thin film layer for gates of said first and second MOSFETs on an upper surface of said substrate; (d) forming said gates of said first and second MOSFETs by depositing and doping a first layer of polycrystalline semiconducting material over said first oxide thin film layer in said first region and a second region; (e) depositing a nitride thin film layer for masking on a whole upper surface of said substrate and removing said nitride layer from predetermined portions of said substrate; (f) etching said first oxide layer of predetermined portions of said third and fourth regions and implanting first conductivity-type ions into the etched portions so as to form inactive base regions of said first and second bipolar transistors; (g) forming second oxide thin film layers on said third and fourth regions of said substrate by employing said nitride layer as a mask; (h) implanting first conductivity-type ions into predetermined portions of said third and fourth regions of said substrate to form active base regions of said first and second bipolar transistors; (i) implanting second conductivity-type ions to form low concentration drain and source regions of said second MOSFET; (j) forming a third oxide thin-film layer on the whole surface of said substrate and etching said oxide layer without any separate mask so as to form oxide-layer spacers on sidewalls of the gates of said first and second MOSFETs; (k) implanting second conductivity-type ions to form a substrate connecting region of said first MOSFET of said first region, a collector connecting region of said third and fourth regions, an emitter region of said second bipolar transistor, and high concentration drain and source regions of said second MOSFET; (l) implanting first conductivity-type ions so as to form drain and source regions of said first MOSFET of said first region and a substrate connecting region of said second MOSFET of said second region; (m) forming a fourth oxide thin film layer on the whole surface of said substrate and making an emitter connecting window of said first bipolar transistor; (n) forming an emitter connecting portion of said first bipolar transistor with a second polycrystalline layer on the upper portion of said third region; (o) making windows for connecting with the drain and source regions of said first and second MOSFETs, the emitter, base and collector region of said first and second bipolar transistors, and the substrate connecting regions of said first and second MOSFETs; (p) making connections with a conduction layer through said windows; and (q) depositing a protecting layer on the whole surface of said substrate and then exposing a pad for wire-welding.

Claim 6

A method for fabricating a semiconductor device containing first and second MOSFETs and first and second bipolar transistors in a first conductivity-type silicon substrate, comprising the steps of: (a) implanting second conductivity-ions onto predetermined regions of said substrate and activating the ion-implanted regions so as to form a first region for said first MOSFET, a third region for said first bipolar transistor, and a fourth region for said second bipolar transistor; (b) forming element-isolation oxide thin film layers between elements of said transistors to isolate said elements from each other on said substrate, and forming first conductivity-type channel stopper regions below said oxide layers; (c) forming a first oxide thin film layer for gates of said first and second MOSFETs on an upper surface of said substrate; (d) forming said gates of said first and second MOSFETs by depositing and doping a first layer of polycrystalline semiconducting material on said first oxide layer in said first and second regions; (e) depositing a nitride thin film layer for masking on an upper surface of said substrate and removing said nitride layer to form predetermined portions of said third and fourth regions of said substrate; (f) etching said first oxide layer of predetermined portions of said third and fourth regions and implanting first conductivity-type ions into the etched potions so as to form inactive base regions of said first and second bipolar transistors; (g) forming second oxide thin film layers on said third and fourth regions of said substrate by employing said nitride layer as a mask; (h) implanting first conductivity-type ions into predetermined portions of said third and fourth regions of said substrate so as to form active base regions of said first and second bipolar transistors; (i) implanting second conductivity-type ions so as to form a substrate connecting region of said first MOSFET of said first region, a collector connecting region of said third and fourth regions, an emitter region of said second bipolar transistor, and drain and source regions of said second MOSFET; (j) implanting first conductivity-type ions so as to form drain and source regions of said first MOSFET of said first region and a substrate connecting region of said second MOSFET of said second region; (k) forming a third oxide thin film layer on the whole surface of said substrate and making an emitter connecting window of said first bipolar transistor; (l) forming an emitter connecting portion of said firms bipolar transistor with a second polycrystalline layer on the upper portion of said third region; (m) making windows for connecting with the drain and source regions of said first and second MOSFETs, the emitter, base and collector regions of said first and second bipolar transistors, and the substrate connecting regions of said first and second MOSFETs; (n) making connections with a conducting layer through said windows; and (o) depositing a protecting layer on the whole surface of said substrate and then exposing a pad for wire-welding.

Claim 7

A method for fabricating a semiconductor device containing first and second MOSFETs and first and second bipolar transistors in a first conductivity-type silicon substrate, comprising the steps of: (a) implanting second conductivity-ions onto predetermined regions of said substrate and activating the ion-implanted regions so as to form a first region for said first MOSFET, a third region for said first bipolar transistor, and a fourth region for said second bipolar transistor; (b) forming element-isolation oxide thin film layers between elements of said transistors to isolate said elements from each other on said substrate, and forming first conductivity-type channel stopper regions below said oxide layers; (c) forming a first oxide thin film layer for gates of said first and second MOSFETs on an upper surface of said substrate; (d) forming said gates of said first and second MOSFETs by depositing and doping a first layer of polycrystalline semiconducting material on said first oxide layer in said first and second regions; (e) depositing a nitride thin film layer for masking on an upper surface of said substrate and removing said nitride layer to form predetermined portions of said third and fourth regions of said substrate; (f) etching said first oxide layer of predetermined portions of said third and fourth regions and implanting first conductivity-type ions into the etched potions so as to form inactive base regions of said first and second bipolar transistors; (g) forming second oxide thin film layers on said third and fourth regions of said substrate by employing said nitride layer as a mask; (h) implanting first conductivity-type ions into predetermined portions of said third and fourth regions of said substrate so as to form active base regions of said first and second bipolar transistors; (i) implanting second conductivity-type ions so as to form a substrate connecting region of said first MOSFET of said first region, a collector connecting region of said third and fourth regions, an emitter region of said second bipolar transistor, and drain and source regions of said second MOSFET; (j) implanting first conductivity-type ions so as to form drain and source regions of said first MOSFET of said first region and a substrate connecting region of said second MOSFET of said second region; (k) forming a third oxide thin film layer on the whole surface of said substrate and making an emitter connecting window of said first bipolar transistor; (l) forming an emitter connecting portion of said firms bipolar transistor with a second polycrystalline layer on the upper portion of said third region; (m) making windows for connecting with the drain and source regions of said first and second MOSFETs, the emitter, base and collector regions of said first and second bipolar transistors, and the substrate connecting regions of said first and second MOSFETs; (n) making connections with a conducting layer through said windows; and (o) depositing a protecting layer on the whole surface of said substrate and then exposing a pad for wire-welding.

Claim 11

A method for fabricating a semiconductor device containing first and second MOSFETs and first and second bipolar transistors in a first conductivity-type silicon substrate, comprising the steps of: (a) implanting second conductivity-type ions into particular regions of said substrate and activating the implanted said regions so as to form a first region for a first MOSFET, a third region for a first bipolar transistor, and a fourth region for a second bipolar transistor; (b) forming element-isolation oxide thin film layers between elements of said first MOSFET, first bipolar and second bipolar transistors to isolate said elements from each other on said substrate, and forming a first conductivity-type channel stopper region below said oxide layers; (c) forming a first oxide thin film layer for gates of said first and second MOSFETs on an upper surface of said substrate; (d) forming said gates of said first and second MOSFETs by depositing and doping a first layer of polycrystalline semiconducting material over said first oxide thin film layer in said first region and a second region; (e) depositing a nitride thin film layer for masking on a whole upper surface of said substrate and removing said nitride layer from selected portions of said third and fourth regions of said substrate; (f) etching said first oxide layer of selected portions of said third and fourth regions and implanting first conductivity-type ions into the etched portions to form inactive base regions of said first and second bipolar transistors; (g) forming second oxide thin film layers on said third and fourth regions of said substrate by employing said nitride layer as a mask; (h) implanting first conductivity-type ions into selected portions of said third and fourth regions of said substrate to form active base regions of said first and second bipolar transistors; (i) implanting second conductivity-type ions to form low concentration drain and source regions of said second MOSFET; (j) forming a third thin oxide thin-film layer on the whole surface of said substrate and etching said oxide layer without any separate mask so as to form oxide-layer spacers on sidewalls of the gate regions of said first and second MOSFETs; (k) implanting second conductivity-type ions to form a substrate connecting region of said first MOSFET of said first region, a collector connecting region of said third and fourth regions, an emitter region of said second bipolar transistor, and high concentration drain and source regions of said second MOSFET; (1) implanting first conductivity-type ions so as to form drain and source regions of said first MOSFET of said first region and a substrate connecting region of said second MOSFET of said second region; (m) forming a fourth oxide thin film layer on the whole surface of said substrate and making an emitter connecting window of said first bipolar transistor; (n) forming an emitter connecting portion of said first bipolar transistor with a second polycrystalline layer on the upper portion of said third region; and (o) making windows for connecting with the drain and source regions of said first and second MOSFETs, the emitter, base and collector region of said first and second bipolar transistors, and the substrate connecting regions of said first and second MOSFETs.

Claim 12

A method for fabricating a semiconductor device containing first and second MOSFETs and first and second bipolar transistors in a first conductivity-type silicon substrate, comprising the steps of: (a) implanting second conductivity-type ions into particular regions of said substrate and activating the implanted said regions so as to form a first region for a first MOSFET, a third region for a first bipolar transistor, and a fourth region for a second bipolar transistor; (b) forming element-isolation oxide thin film layers between elements of said first MOSFET, first bipolar and second bipolar transistors to isolate said elements from each other on said substrate, and forming a first conductivity-type channel stopper region below said oxide layers; (c) forming a first oxide thin film layer for gates of said first and second MOSFETs on an upper surface of said substrate; (d) forming said gates of said first and second MOSFETs by depositing and doping a first layer of polycrystalline semiconducting material over said first oxide thin film layer in said first region and a second region; (e) depositing a nitride thin film layer for masking on a whole upper surface of said substrate and removing said nitride layer from selected portions of said third and fourth regions of said substrate; (f) etching said first oxide layer of selected portions of said third and fourth regions and implanting first conductivity-type ions into the etched portions to form inactive base regions of said first and second bipolar transistors; (g) forming second oxide thin film layers on said third and fourth regions of said substrate by employing said nitride layer as a mask; (h) implanting first conductivity-type ions into selected portions of said third and fourth regions of said substrate to form active base regions of said first and second bipolar transistors; (i) implanting second conductivity-type ions to form low concentration drain and source regions of said second MOSFET; (j) forming a third thin oxide thin-film layer on the whole surface of said substrate and etching said oxide layer without any separate mask so as to form oxide-layer spacers on sidewalls of the gate regions of said first and second MOSFETs; (k) implanting second conductivity-type ions to form a substrate connecting region of said first MOSFET of said first region, a collector connecting region of said third and fourth regions, an emitter region of said second bipolar transistor, and high concentration drain and source regions of said second MOSFET; (1) implanting first conductivity-type ions so as to form drain and source regions of said first MOSFET of said first region and a substrate connecting region of said second MOSFET of said second region; (m) forming a fourth oxide thin film layer on the whole surface of said substrate and making an emitter connecting window of said first bipolar transistor; (n) forming an emitter connecting portion of said first bipolar transistor with a second polycrystalline layer on the upper portion of said third region; and (o) making windows for connecting with the drain and source regions of said first and second MOSFETs, the emitter, base and collector region of said first and second bipolar transistors, and the substrate connecting regions of said first and second MOSFETs.

Claim 16

A method first fabricating a semiconductor device containing first and second MOSFETs and first and second bipolar transistors in a first conductivity-type silicon substrate, comprising the steps of: (a) implanting second conductivity-ions into particular regions of said substrate and activating the ion-implanted regions so as to form a first region for a first MOSFET, a third region for a first bipolar transistor, and a fourth region for a second bipolar transistor; (b) forming element-isolation oxide thin film layers between elements of said first MOSFET, first bipolar and second bipolar transistor to isolate said elements from each other on said substrate, and forming first conductivity-type channel stopper regions below said oxide layers; (c) forming a first oxide thin film layer for gates of said first and second MOSFETs on an upper surface of said substrate; (d) forming said gates of said first and second MOSFETs by depositing and doping a first layer of polycrystalline semiconducting material over said first oxide layer in said first and second regions; (e) depositing a nitride thin film layer for masking on the upper surface of said substrate and removing said nitride layer from selected portions of said third and fourth regions of said substrate; (f) etching said first oxide layer of selected portions of said third and fourth regions and implanting first conductivity-type ions into the etched portions so as to form inactive base regions of said first and second bipolar transistors; (g) forming second oxide thin film layers on said third and fourth regions of said substrate by employing said nitride layer as a mask; (h) implanting first conductivity-type ions into selected portions of said third and fourth regions of said substrate so as to form active base regions of said first and second bipolar transistors; (i) implanting second conductivity-type ions to form a substrate connecting region of said first MOSFET of said first region, a collector connecting region of said first MOSFET of said first region, a collector connecting region of said third and fourth regions, an emitter region of said second bipolar transistor, and drain and source regions of said second MOSFET; (j) implanting first conductivity-type ions to form drain and source regions of said first MOSFET of said first region and a substrate connecting region of said second MOSFET of said second region; (k) forming a third oxide thin film layer on the whole surface of said substrate and making an emitter connecting window of said first bipolar transistor; (1) forming an emitter connecting portion of said first bipolar transistor with a second polycrystalline layer on the upper portion of said third region; and (m) making windows for connecting with the drain and source regions of said first and second MOSFETs, the emitter, base and collector regions of said first and second bipolar transistors, and the substrate connecting regions of said first and second

Claim 17

A method first fabricating a semiconductor device containing first and second MOSFETs and first and second bipolar transistors in a first conductivity-type silicon substrate, comprising the steps of: (a) implanting second conductivity-ions into particular regions of said substrate and activating the ion-implanted regions so as to form a first region for a first MOSFET, a third region for a first bipolar transistor, and a fourth region for a second bipolar transistor; (b) forming element-isolation oxide thin film layers between elements of said first MOSFET, first bipolar and second bipolar transistor to isolate said elements from each other on said substrate, and forming first conductivity-type channel stopper regions below said oxide layers; (c) forming a first oxide thin film layer for gates of said first and second MOSFETs on an upper surface of said substrate; (d) forming said gates of said first and second MOSFETs by depositing and doping a first layer of polycrystalline semiconducting material over said first oxide layer in said first and second regions; (e) depositing a nitride thin film layer for masking on the upper surface of said substrate and removing said nitride layer from selected portions of said third and fourth regions of said substrate; (f) etching said first oxide layer of selected portions of said third and fourth regions and implanting first conductivity-type ions into the etched portions so as to form inactive base regions of said first and second bipolar transistors; (g) forming second oxide thin film layers on said third and fourth regions of said substrate by employing said nitride layer as a mask; (h) implanting first conductivity-type ions into selected portions of said third and fourth regions of said substrate so as to form active base regions of said first and second bipolar transistors; (i) implanting second conductivity-type ions to form a substrate connecting region of said first MOSFET of said first region, a collector connecting region of said first MOSFET of said first region, a collector connecting region of said third and fourth regions, an emitter region of said second bipolar transistor, and drain and source regions of said second MOSFET; (j) implanting first conductivity-type ions to form drain and source regions of said first MOSFET of said first region and a substrate connecting region of said second MOSFET of said second region; (k) forming a third oxide thin film layer on the whole surface of said substrate and making an emitter connecting window of said first bipolar transistor; (1) forming an emitter connecting portion of said first bipolar transistor with a second polycrystalline layer on the upper portion of said third region; and (m) making windows for connecting with the drain and source regions of said first and second MOSFETs, the emitter, base and collector regions of said first and second bipolar transistors, and the substrate connecting regions of said first and second

Claim 21

A method for fabricating a semiconductor device containing first and second MOSFETs and a first bipolar transistor in a first conductivity-type silicon substrate, comprising the steps of: (a) implanting second conductivity-type ions into particular regions of said substrate and activating the implanted said regions to form a first region for said first MOSFET, and a third region for said first bipolar transistor; (b) forming element-isolation oxide thin film layers between elements of said first MOSFET and first bipolar transistor to isolate said elements from each other on said substrate, and forming a first conductivity-type channel stopper region below said oxide layers; (c) forming a first oxide thin film layer for gates of said first MOSFET and a second MOSFET on an upper surface of said substrate; (d) forming said gates of said first and second MOSFETs by depositing and doping a first layer of a polycrystalline semiconducting material over said first oxide thin film layer in said first region and a second region; (e) depositing a nitride thin film layer for masking on a whole upper surface of said substrate and removing said nitride layer from selected portions of said third and fourth regions of said substrate; (f) etching said first oxide layer of selected portions of said third and fourth regions and implanting first conductivity-type ions into the etched portions to form an inactive base region of said first bipolar transistor; (g) forming second oxide thin film layers on said third region of said substrate by employing said nitride layer as a mask; (h) implanting first conductivity-type ions into selected portions of said third region of said substrate to form an active base region of said first bipolar transistor; (i) implanting second conductivity-type ions to form low concentration drain and source regions of said second MOSFET; (j) forming a thin oxide thin-film layer on the whole surface of said substrate and etching said oxide layer without any separate mask to form oxide-layer spacers on sidewalls of the gate regions of said first and second MOSFETs; (k) implanting second conductivity-type ions to form a substrate connecting region of said first MOSFET of said first region, a collector connecting region of said third region, high concentration drain and source regions of said second MOSFET, and a collector connecting region of said first bipolar transistor; (l) implanting first conductivity-type ions to form drain and source regions of said first MOSFET of said first region; (m) forming a fourth oxide thin film layer on the whole surface of said substrate and making an emitter connecting window of said first bipolar transistor; (n) forming the emitter connecting portion of said first bipolar transistor with a second polycrystalline layer on the upper portion of said third region; and (o) making windows for connecting with the drain and source regions of said first and second MOSFETs, the emitter, base and collector region of said first bipolar transistor, and the substrate connecting regions of said first and second MOSFETs.

Claim 22

A method for fabricating a semiconductor device containing first and second MOSFETs and a first bipolar transistor in a first conductivity-type silicon substrate, comprising the steps of: (a) implanting second conductivity-type ions into particular regions of said substrate and activating the implanted said regions to form a first region for said first MOSFET, and a third region for said first bipolar transistor; (b) forming element-isolation oxide thin film layers between elements of said first MOSFET and first bipolar transistor to isolate said elements from each other on said substrate, and forming a first conductivity-type channel stopper region below said oxide layers; (c) forming a first oxide thin film layer for gates of said first MOSFET and a second MOSFET on an upper surface of said substrate; (d) forming said gates of said first and second MOSFETs by depositing and doping a first layer of a polycrystalline semiconducting material over said first oxide thin film layer in said first region and a second region; (e) depositing a nitride thin film layer for masking on a whole upper surface of said substrate and removing said nitride layer from selected portions of said third and fourth regions of said substrate; (f) etching said first oxide layer of selected portions of said third and fourth regions and implanting first conductivity-type ions into the etched portions to form an inactive base region of said first bipolar transistor; (g) forming second oxide thin film layers on said third region of said substrate by employing said nitride layer as a mask; (h) implanting first conductivity-type ions into selected portions of said third region of said substrate to form an active base region of said first bipolar transistor; (i) implanting second conductivity-type ions to form low concentration drain and source regions of said second MOSFET; (j) forming a thin oxide thin-film layer on the whole surface of said substrate and etching said oxide layer without any separate mask to form oxide-layer spacers on sidewalls of the gate regions of said first and second MOSFETs; (k) implanting second conductivity-type ions to form a substrate connecting region of said first MOSFET of said first region, a collector connecting region of said third region, high concentration drain and source regions of said second MOSFET, and a collector connecting region of said first bipolar transistor; (l) implanting first conductivity-type ions to form drain and source regions of said first MOSFET of said first region; (m) forming a fourth oxide thin film layer on the whole surface of said substrate and making an emitter connecting window of said first bipolar transistor; (n) forming the emitter connecting portion of said first bipolar transistor with a second polycrystalline layer on the upper portion of said third region; and (o) making windows for connecting with the drain and source regions of said first and second MOSFETs, the emitter, base and collector region of said first bipolar transistor, and the substrate connecting regions of said first and second MOSFETs.

Claim 26

A method for fabricating a semiconductor device containing first and second MOSFETs and a first bipolar transistor in a first conductivity-type silicon substrate, comprising the steps of: (a) implanting second conductivity-ions into particular regions of said substrate and activating the ion-implanted regions to form a first region for a first MOSFET and a third region for a first bipolar transistor; (b) forming element-isolation oxide thin film layers between elements of said first MOSFET and first bipolar transistor to isolate said elements from each other on said substrate, and forming first conductivity-type channel stopper regions below said oxide layers; (c) forming a first oxide thin film layer for gates of said first and second MOSFETs on an upper surface of said substrate; (d) forming said gates of said first and a second MOSFETs by depositing and doping a first layer of polycrystalline semiconducting material over said first oxide layer in said first and second regions; (e) depositing a nitride thin film layer for masking on an upper surface of said substrate and removing said nitride layer from selected portions of said third region of said substrate; (f) etching said first oxide layer of selected portions of said third region and implanting first conductivity-type ions into the etched portions to form an inactive base region of said first bipolar transistor; (g) forming second oxide thin film layers on said third region of said substrate by employing said nitride layer as a mask; (h) implanting first conductivity-type ions into selected portions of said third region of said substrate to form an active base region of said first bipolar transistor; (i) implanting second conductivity-type ions to form a substrate connecting region of said first MOSFET of said first region, a collector connecting region of said third region, and drain and source regions of said second MOSFET; (j) implanting first conductivity-type ions to form drain and source regions of said first MOSFET of said first region and a substrate connecting region of said second MOSFET of said second region; (k) forming a third oxide thin film layer on the whole surface of said substrate and making an emitter connecting window of said first bipolar transistor; (l) forming an emitter connecting portion of said first bipolar transistor with a second layer of polycrystalline semiconducting material on the upper portion of said third region; and (m) making windows for connecting with the drain and source regions of said first and second MOSFETs, the emitter, base and collector regions of said first bipolar transistor, and the substrate connecting regions of said first and second MOSFETs.

Claim 27

A method for fabricating a semiconductor device containing first and second MOSFETs and a first bipolar transistor in a first conductivity-type silicon substrate, comprising the steps of: (a) implanting second conductivity-ions into particular regions of said substrate and activating the ion-implanted regions to form a first region for a first MOSFET and a third region for a first bipolar transistor; (b) forming element-isolation oxide thin film layers between elements of said first MOSFET and first bipolar transistor to isolate said elements from each other on said substrate, and forming first conductivity-type channel stopper regions below said oxide layers; (c) forming a first oxide thin film layer for gates of said first and second MOSFETs on an upper surface of said substrate; (d) forming said gates of said first and a second MOSFETs by depositing and doping a first layer of polycrystalline semiconducting material over said first oxide layer in said first and second regions; (e) depositing a nitride thin film layer for masking on an upper surface of said substrate and removing said nitride layer from selected portions of said third region of said substrate; (f) etching said first oxide layer of selected portions of said third region and implanting first conductivity-type ions into the etched portions to form an inactive base region of said first bipolar transistor; (g) forming second oxide thin film layers on said third region of said substrate by employing said nitride layer as a mask; (h) implanting first conductivity-type ions into selected portions of said third region of said substrate to form an active base region of said first bipolar transistor; (i) implanting second conductivity-type ions to form a substrate connecting region of said first MOSFET of said first region, a collector connecting region of said third region, and drain and source regions of said second MOSFET; (j) implanting first conductivity-type ions to form drain and source regions of said first MOSFET of said first region and a substrate connecting region of said second MOSFET of said second region; (k) forming a third oxide thin film layer on the whole surface of said substrate and making an emitter connecting window of said first bipolar transistor; (l) forming an emitter connecting portion of said first bipolar transistor with a second layer of polycrystalline semiconducting material on the upper portion of said third region; and (m) making windows for connecting with the drain and source regions of said first and second MOSFETs, the emitter, base and collector regions of said first bipolar transistor, and the substrate connecting regions of said first and second MOSFETs.

Claim 31

A method for fabricating a semiconductor device containing a first MOSFET and first and second bipolar transistors in a first conductivity-type silicon substrate, comprising the steps of: (a) implanting second conductivity-type ions into particular regions of said substrate and activating the implanted said regions to form a first region for a first MOSFET, a third region for a first bipolar transistor, and a fourth region for a second bipolar transistor; (b) forming element-isolation oxide thin film layers between elements of said first MOSFET, first bipolar and second bipolar transistors to isolate said elements from each other on said substrate, and forming a first conductivity-type channel stopper region below said oxide layers; (c) forming a first oxide thin film layer for a gate of said first MOSFET on an upper surface of said substrate; (d) forming said gate of said first MOSFET by depositing and doping a second layer of polycrystalline semiconducting material over said first oxide thin film layer in said first region; (e) depositing a nitride thin film layer for masking on a whole upper surface of said substrate and removing said nitride layer from selected portions of said third and fourth regions of said substrate; (f) etching said first oxide layer of selected portions of said third and fourth regions and implanting first conductivity-type ions into the etched portions to form inactive base regions of said first and second bipolar transistors; (g) forming second oxide thin film layers on said third and fourth regions of said substrate by employing said nitride layer as a mask; (h) implanting first conductivity-type ions into selected portions of said third and fourth regions of said substrate to form active base regions of said first and second bipolar transistors; (i) forming a third thin oxide thin-film layer on the whole surface of said substrate and etching said oxide layer without any separate mask to form oxide-layer spacers on sidewalls of the gate region of said first MOSFET; (j) implanting second conductivity-type ions to form a substrate connecting region of said first MOSFET of said first region, a collector connecting region of said third and fourth regions, and an emitter region of said second bipolar transistor; (k) implanting first conductivity-type ions to form drain and source regions of said first MOSFET of said first region; (l) forming a fourth oxide thin film layer on the exposed surface of said substrate and making an emitter connecting window for said first bipolar transistor; (m) forming an emitter connecting portion of said first bipolar transistor with a second polycrystalline layer on the upper portion of said third region; and (n) making windows for connecting with the drain and source regions of said first MOSFET, the emitter, base and collector region of said first and second bipolar transistors, and the substrate connecting regions of said first MOSFET.

Claim 32

A method for fabricating a semiconductor device containing a first MOSFET and first and second bipolar transistors in a first conductivity-type silicon substrate, comprising the steps of: (a) implanting second conductivity-type ions into particular regions of said substrate and activating the implanted said regions to form a first region for a first MOSFET, a third region for a first bipolar transistor, and a fourth region for a second bipolar transistor; (b) forming element-isolation oxide thin film layers between elements of said first MOSFET, first bipolar and second bipolar transistors to isolate said elements from each other on said substrate, and forming a first conductivity-type channel stopper region below said oxide layers; (c) forming a first oxide thin film layer for a gate of said first MOSFET on an upper surface of said substrate; (d) forming said gate of said first MOSFET by depositing and doping a second layer of polycrystalline semiconducting material over said first oxide thin film layer in said first region; (e) depositing a nitride thin film layer for masking on a whole upper surface of said substrate and removing said nitride layer from selected portions of said third and fourth regions of said substrate; (f) etching said first oxide layer of selected portions of said third and fourth regions and implanting first conductivity-type ions into the etched portions to form inactive base regions of said first and second bipolar transistors; (g) forming second oxide thin film layers on said third and fourth regions of said substrate by employing said nitride layer as a mask; (h) implanting first conductivity-type ions into selected portions of said third and fourth regions of said substrate to form active base regions of said first and second bipolar transistors; (i) forming a third thin oxide thin-film layer on the whole surface of said substrate and etching said oxide layer without any separate mask to form oxide-layer spacers on sidewalls of the gate region of said first MOSFET; (j) implanting second conductivity-type ions to form a substrate connecting region of said first MOSFET of said first region, a collector connecting region of said third and fourth regions, and an emitter region of said second bipolar transistor; (k) implanting first conductivity-type ions to form drain and source regions of said first MOSFET of said first region; (l) forming a fourth oxide thin film layer on the exposed surface of said substrate and making an emitter connecting window for said first bipolar transistor; (m) forming an emitter connecting portion of said first bipolar transistor with a second polycrystalline layer on the upper portion of said third region; and (n) making windows for connecting with the drain and source regions of said first MOSFET, the emitter, base and collector region of said first and second bipolar transistors, and the substrate connecting regions of said first MOSFET.

Claim 36

A method for fabricating a semiconductor device containing a first MOSFET and first and second bipolar transistors in a first conductivity-type silicon substrate, comprising the steps of: (a) implanting second conductivity-ions into particular regions of said substrate and activating the ion-implanted regions to form a first region for a first MOSFET, a third region for a first bipolar transistor, and a fourth region for a second bipolar transistor; (b) forming element-isolation oxide thin film layers between elements of said first MOSFET, first bipolar and second bipolar transistors to isolate said elements from each other on said substrate, and forming first conductivity-type channel stopper regions below said oxide layers; (c) forming a first oxide thin film layer for a gate of said first MOSFET on an upper surface of said substrate; (d) forming said gate of said first MOSFET by depositing and doping a first layer of polycryatalline semiconducting material over said first oxide layer in said first region; (e) depositing a nitride thin film layer for masking on the upper surface of said substrate and removing said nitride layer from selected portions of said third and fourth regions of said substrate; (f) etching said first oxide layer of selected portions of said third and fourth regions and implanting first conductivity-type ions into the etched portions so as to form inactive base regions of said first and second bipolar transistors; (g) forming second oxide thin film layers on said third and fourth regions of said substrate by employing said nitride layer as a mask; (h) implanting first conductivity-type ions into selected portions of said third and fourth regions of said substrate to form an active base region of said first and second bipolar transistors; (i) implanting second conductivity-type ions to form a substrate connecting region of said first MOSFET of said first region, a collector connecting region of said third and fourth regions, and an emitter region of said second bipolar transistor; (j) implanting first conductivity-type ions to form drain and source regions of said first MOSFET of said first region; (k) forming a third oxide thin film layer on the whole surface of said substrate and making an emitter connecting window of said first bipolar transistor; (l) forming an emitter connecting portion of said first bipolar transistor with second polycrystalline layer on the upper portion of said third region; and (m) making windows for connecting with the drain and source regions of said first MOSFET, the emitter, base and collector regions of said first and second bipolar transistors, and the substrate connecting regions of said first MOSFET.

Claim 37

A method for fabricating a semiconductor device containing a first MOSFET and first and second bipolar transistors in a first conductivity-type silicon substrate, comprising the steps of: (a) implanting second conductivity-ions into particular regions of said substrate and activating the ion-implanted regions to form a first region for a first MOSFET, a third region for a first bipolar transistor, and a fourth region for a second bipolar transistor; (b) forming element-isolation oxide thin film layers between elements of said first MOSFET, first bipolar and second bipolar transistors to isolate said elements from each other on said substrate, and forming first conductivity-type channel stopper regions below said oxide layers; (c) forming a first oxide thin film layer for a gate of said first MOSFET on an upper surface of said substrate; (d) forming said gate of said first MOSFET by depositing and doping a first layer of polycryatalline semiconducting material over said first oxide layer in said first region; (e) depositing a nitride thin film layer for masking on the upper surface of said substrate and removing said nitride layer from selected portions of said third and fourth regions of said substrate; (f) etching said first oxide layer of selected portions of said third and fourth regions and implanting first conductivity-type ions into the etched portions so as to form inactive base regions of said first and second bipolar transistors; (g) forming second oxide thin film layers on said third and fourth regions of said substrate by employing said nitride layer as a mask; (h) implanting first conductivity-type ions into selected portions of said third and fourth regions of said substrate to form an active base region of said first and second bipolar transistors; (i) implanting second conductivity-type ions to form a substrate connecting region of said first MOSFET of said first region, a collector connecting region of said third and fourth regions, and an emitter region of said second bipolar transistor; (j) implanting first conductivity-type ions to form drain and source regions of said first MOSFET of said first region; (k) forming a third oxide thin film layer on the whole surface of said substrate and making an emitter connecting window of said first bipolar transistor; (l) forming an emitter connecting portion of said first bipolar transistor with second polycrystalline layer on the upper portion of said third region; and (m) making windows for connecting with the drain and source regions of said first MOSFET, the emitter, base and collector regions of said first and second bipolar transistors, and the substrate connecting regions of said first MOSFET.