Patent US4908623A successfully refreshed from Google Patents.
US4908623A
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Apparatus and method for range control and supply voltage compensation in a dual slope analog to digital converter
Assignee: Honeywell Inc
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Filing: 1988-08-08
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Granted: 1990-03-13
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Expires: 2008-08-08
Abstract
Abstract Apparatus for control of the range of input voltage values to be measured and for compensation of the changes in the supply voltage of an analog to digital dual slope converter circuit is described. The selection of a range for input voltage measurements in the analog to digital converter circuit permits the conversion to take place over a relatively long time period, thereby increasing the resolution of the resulting conversion. Changes in the supply voltage are combined with the input analog signal (during the capacitance charging period) and with the reference voltage (during the capacitance discharge cycle) providing compensation for the effects of time, temperature and the tolerance of the supply voltage.
Inventors
- 👤 David C. Ullestad
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 03:27
CPC Classifications
H; H03; H03M; H03M1/00; H03M1/12; H03M1/124; H03M1/129; H03M1/50; H03M1/52
Claims Analysis
Total Claims: 25
Claim 1
Independent Claim
143 words
A dual slope analog to digital converter circuit comprising: a first operational amplifier with a capacitor coupled thereto configured as an integrating circuit; a second operational amplifier having an output terminal coupled to an inverting input terminal of said first operational amplifier; a switch responsive to control signals for coupling a known voltage to an inverting terminal of said second operational amplifier when said switch is in a first state, said switch coupling an analog voltage to said inverting terminal of said second operational amplifier when said switch is in a second state; and resistor network means for applying a reference signal to a non-inverting terminal of said first operational amplifier, said resistor network means applying a predetermined portion of a reference signal applied to a non-inverting terminal of said first operational amplifier to a non-inverting input terminal of said second operational amplifier.
Claim 2
Dependent Claim
143 words
A dual slope analog to digital converter circuit comprising: a first operational amplifier with a capacitor coupled thereto configured as an integrating circuit; a second operational amplifier having an output terminal coupled to an inverting input terminal of said first operational amplifier; a switch responsive to control signals for coupling a known voltage to an inverting terminal of said second operational amplifier when said switch is in a first state, said switch coupling an analog voltage to said inverting terminal of said second operational amplifier when said switch is in a second state; and resistor network means for applying a reference signal to a non-inverting terminal of said first operational amplifier, said resistor network means applying a predetermined portion of a reference signal applied to a non-inverting terminal of said first operational amplifier to a non-inverting input terminal of said second operational amplifier.
Claim 3
Dependent Claim
37 words
The dual slope analog to digital converter circuit of claim 1 wherein parameters of said second operational amplifier are selected to provide for a compensation of said reference signal by said predetermined portion of said reference signal.
Claim 4
Dependent Claim
22 words
The dual slope analog to digital converter circuit of claim 2 wherein a supply voltage is applied to said resistor network means.
Claim 5
Dependent Claim
30 words
The dual slope analog to digital converter circuit of claim 2 further comprising an input voltage range selection means, said range selection means being coupled to said resistor network means.
Claim 6
Dependent Claim
41 words
The dual slope analog to digital converter circuit of claim 4 further comprising: timing means coupled to said output terminal of said first operational amplifier, said timing means measuring at least a portion of charging and discharging times for said capacitor.
Claim 7
Dependent Claim
36 words
The dual slope analog to digital converter circuit of claim 5 wherein said timing means includes a comparison circuit for comparing an output voltage applied to said first operational amplifier output circuit with a comparison voltage.
Claim 8
Dependent Claim
52 words
The dual slope analog to digital converter circuit of claim 6 further comprising: a third operational amplifier with an output terminal coupled to said switch, said third operational amplifier having a non-inverting input terminal coupled to said input signal, said third operational amplifier having an inverting terminal coupled to a voltage source.
Claim 9
Dependent Claim
36 words
The dual slope analog to digital converter circuit of claim 5 wherein said range selection means includes a plurality of resistors coupled in series, each of said plurality of resistors having a switch coupled in parallel.
Claim 10
Dependent Claim
28 words
The dual slope analog to digital converter circuit of claim 5 further including calibration means for calibrating said timing means in each of input voltage range selection means.
Claim 11
Dependent Claim
31 words
The dual slope analog to digital converter circuit of claim 5 wherein said timing means includes apparatus for determining when said first amplifier output voltage is not within an appropriate range.
Claim 12
Independent Claim
152 words
The method of converting an analog signal to a digital quantity, the method comprising the steps of: applying said analog signal to a first terminal of a first operational amplifier configured as an integrator for a predetermined period of time; applying a known signal to said first terminal of said first operational amplifier; applying a portion of a reference voltage to a second terminal of said first operational amplifier; applying an output signal from said first operational amplifier to a first terminal of a second operational amplifier; applying said reference voltage to a second terminal of said second operational amplifier; and applying an output signal from said second operational amplifier to a timer means, wherein said known signal is applied to said first amplifier until said second operational amplifier output signal reaches a predetermined value and an output signal of said timer means provides said digital quantity representative of said analog signal.
Claim 13
Independent Claim
152 words
The method of converting an analog signal to a digital quantity, the method comprising the steps of: applying said analog signal to a first terminal of a first operational amplifier configured as an integrator for a predetermined period of time; applying a known signal to said first terminal of said first operational amplifier; applying a portion of a reference voltage to a second terminal of said first operational amplifier; applying an output signal from said first operational amplifier to a first terminal of a second operational amplifier; applying said reference voltage to a second terminal of said second operational amplifier; and applying an output signal from said second operational amplifier to a timer means, wherein said known signal is applied to said first amplifier until said second operational amplifier output signal reaches a predetermined value and an output signal of said timer means provides said digital quantity representative of said analog signal.
Claim 14
Dependent Claim
41 words
The method for analog to digital signal conversion of claim 11 further comprising the step of: selecting component parameters associated with said first and said second operational amplifiers to compensate for changes in said reference voltage by said reference voltage portion.
Claim 15
Dependent Claim
28 words
The method for analog to digital signal conversion of claim 12 further comprising the step of selecting said reference voltage to be a function of a supply voltage.
Claim 16
Dependent Claim
28 words
The method for analog to digital signal conversion of claim 12 further comprising the step of: providing range selection apparatus to select from a plurality of conversion ranges.
Claim 17
Dependent Claim
28 words
The method for analog to digital signal conversion of claim 14 further comprising the step of: selecting said reference voltage to be a function of said range apparatus.
Claim 18
Dependent Claim
34 words
The method for analog to digital signal conversion of claim 12 further comprising the step of monitoring said second operational amplifier output signal to determine when said analog signal is in a correct range.
Claim 19
Dependent Claim
32 words
The method for analog to digital conversion of claim 11 further comprising the step of; calibrating said conversion by a first and a second preselected voltage level in each input voltage range.
Claim 20
Dependent Claim
114 words
An analog to digital converter circuit comprising: an integrating circuit having a reference signal applied to a first terminal thereof; an operational amplifier having a output terminal coupled to a second input terminal of said integrating circuit, said operational amplifier having a reference signal portion coupled to a first input terminal; a switch responsive to control signals for selectively applying a input signal and a known signal to a second terminal of said operational amplifier; timer means coupled to an output terminal of said integrating circuit for providing a count related to a time said input voltage was applied to said operational amplifier first terminal, said timer means providing control signal to said switch.
Claim 21
Dependent Claim
114 words
An analog to digital converter circuit comprising: an integrating circuit having a reference signal applied to a first terminal thereof; an operational amplifier having a output terminal coupled to a second input terminal of said integrating circuit, said operational amplifier having a reference signal portion coupled to a first input terminal; a switch responsive to control signals for selectively applying a input signal and a known signal to a second terminal of said operational amplifier; timer means coupled to an output terminal of said integrating circuit for providing a count related to a time said input voltage was applied to said operational amplifier first terminal, said timer means providing control signal to said switch.
Claim 22
Dependent Claim
21 words
The analog to digital converter circuit of claim 18 further comprising: range means for measuring input signals having selected magnitude ranges.
Claim 23
Dependent Claim
33 words
The analog to digital converter circuit of claim 19 wherein components associated with said operational amplifier and said integrating circuit are selected so that said reference signal portion compensates for said reference signal.
Claim 24
Dependent Claim
18 words
The analog to digital converter circuit of claim 19 further comprising calibration means for calibrating said range means.
Claim 25
Dependent Claim
52 words
The analog to digital converter circuit of claim 18 further comprising: a second operational amplifier, said second operational amplifier having an output terminal coupled to said switch and a first input terminal coupled to said input signal, a second input terminal of said second operational amplifier coupled to a second supply voltage.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1993-03-12 | 1993-09-11 | 1994-03-13 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1997-03-12 | 1997-09-11 | 1998-03-13 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2001-03-12 | 2001-09-11 | 2002-03-13 | $7700.00 | Window Closed / Lapsed |