US4905070A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Semiconductor device exhibiting no degradation of low current gain
Assignee: NXP USA Inc
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Filing: 1988-09-02
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Granted: 1990-02-27
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Expires: 2008-09-02
Abstract
Abstract The degradation of the low current gain, which is exhibited during emitter-base reverse bias breakdown testing, is prevented by providing an emitter-base resistive shunt on the surface. This resistive shunt, preferably made of silicon nitride. utilizes surface recombination to reduce the low current gain permanently, thus a degradation is not exhibited upon testing.
Inventors
- 👤 Israel A. Lesk
- 👤 Peter J. Zdebel
- 👤 Han-Bin K. Liang
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 05:44
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/101; H10D84/131; H10D84/133; H10D84/121
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
77 words
An integrated semiconductor device comprising: a semiconductor substrate of a first conductivity type having a surface, a first doped region of opposite conductivity type than the substrate, and a second doped region of the first conductivity type inside the first doped region; and a resistive film disposed on the surface of the substrate partially overlaying the first and second doped regions, wherein the resistive film acts as a shunt which prevents a degradation of low current gain.
Claim 2
Dependent Claim
77 words
An integrated semiconductor device comprising: a semiconductor substrate of a first conductivity type having a surface, a first doped region of opposite conductivity type than the substrate, and a second doped region of the first conductivity type inside the first doped region; and a resistive film disposed on the surface of the substrate partially overlaying the first and second doped regions, wherein the resistive film acts as a shunt which prevents a degradation of low current gain.
Claim 3
Dependent Claim
13 words
The semiconductor device of claim 1 wherein the resistive film is silicon nitride.
Claim 4
Dependent Claim
32 words
The semiconductor device of claim 2 wherein the silicon nitride is approximately 100-1000 angstroms in thickness, and wherein the resistivity of the silicon nitride is approximately 10 15 to 10 17 ohm-cm.
Claim 5
Dependent Claim
19 words
The semiconductor device of claim 1, further comprising a silicon dioxide layer disposed on at least the resistive film.
Claim 6
Dependent Claim
88 words
A bipolar transistor comprising: a semiconductor substrate having a top surface, a collector region of a first conductivity type, a base region of a second conductivity type, and an emitter region of the first conductivity type disposed in the base region, and wherein the base, emitter, and collector regions extend to the top surface of the semiconductor substrate; and a silicon nitride layer disposed on the surface of the semiconductor substrate partially overlaying the emitter and base regions wherein the silicon nitride prevents a degradation of current gain.
Claim 7
Dependent Claim
88 words
A bipolar transistor comprising: a semiconductor substrate having a top surface, a collector region of a first conductivity type, a base region of a second conductivity type, and an emitter region of the first conductivity type disposed in the base region, and wherein the base, emitter, and collector regions extend to the top surface of the semiconductor substrate; and a silicon nitride layer disposed on the surface of the semiconductor substrate partially overlaying the emitter and base regions wherein the silicon nitride prevents a degradation of current gain.
Claim 8
Dependent Claim
33 words
The bipolar transistor of claim 5 wherein the silicon nitride layer is approximately 100-1000 angstroms in thickness, and wherein the resistivity of the silicon nitride is approximately 10 15 to 10 17 ohm-cm.
Claim 9
Dependent Claim
21 words
The bipolar transistor of claim 5 further comprising a layer of silicon dioxide disposed on at least the silicon nitride layer.
Claim 10
Dependent Claim
55 words
An integrated semiconductor device having improved gain, comprising: a semiconductor substrate; a P-N junction formed in the substrate; and a resistive surface shunt positioned on the substrate to overlap the P-N junction to prevent a surface channel from forming and to prevent reverse bias P-N junction ageing induced reduction of low and high current gain.
Claim 11
Dependent Claim
55 words
An integrated semiconductor device having improved gain, comprising: a semiconductor substrate; a P-N junction formed in the substrate; and a resistive surface shunt positioned on the substrate to overlap the P-N junction to prevent a surface channel from forming and to prevent reverse bias P-N junction ageing induced reduction of low and high current gain.
Claim 12
Dependent Claim
15 words
The semiconductor device of claim 8 wherein the resistive shunt is a silicon nitride shunt.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1993-02-26 | 1993-08-28 | 1994-02-27 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1997-02-26 | 1997-08-28 | 1998-02-27 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2001-02-26 | 2001-08-28 | 2002-02-27 | $7700.00 | Window Closed / Lapsed |