Process for making BiCMOS integrated circuit having a shallow trench bipolar transistor with vertical base contacts

Claim 1

A method of fabricating a BiCMOS integrated circuit, comprising the steps of: providing a semiconductor substrate; forming at least an isolated NMOS device region, at least an isolated PMOS device region and at least an isolated bipolar device region in the substrate; forming a gate oxide layer and a polysilicon gate region over the isolated NMOS device region and over the PMOS device region; forming a first source region and a first drain region in the isolated NMOS device region; forming a second source region and a second drain region in the isolated PMOS device region, and forming a first extrinsic base region in the isolated bipolar device region; forming an oxide layer over the substrate; forming a shallow trench in the oxide and in the isolated bipolar device region of the substrate, wherein the shallow trench is etched slightly shallower than the depth of the first extrinsic base region and slightly overlapping the first extrinsic base region; forming an active base region in the substrate at the bottom of the shallow trench; forming sidewall spacers in the shallow trench opening; and forming a polysilicon emitter region self-aligned in the shallow trench.

Claim 2

A method of fabricating a BiCMOS integrated circuit, comprising the steps of: providing a semiconductor substrate; forming at least an isolated NMOS device region, at least an isolated PMOS device region and at least an isolated bipolar device region in the substrate; forming a gate oxide layer and a polysilicon gate region over the isolated NMOS device region and over the PMOS device region; forming a first source region and a first drain region in the isolated NMOS device region; forming a second source region and a second drain region in the isolated PMOS device region, and forming a first extrinsic base region in the isolated bipolar device region; forming an oxide layer over the substrate; forming a shallow trench in the oxide and in the isolated bipolar device region of the substrate, wherein the shallow trench is etched slightly shallower than the depth of the first extrinsic base region and slightly overlapping the first extrinsic base region; forming an active base region in the substrate at the bottom of the shallow trench; forming sidewall spacers in the shallow trench opening; and forming a polysilicon emitter region self-aligned in the shallow trench.

Claim 7

A method of fabricating a bipolar transistor of a BiCMOS integrated circuit, comprising the steps of: providing a semiconductor substrate; forming at least an isolated NMOS device region, at least an isolated PMOS device region and at least an isolated bipolar device region in the substrate; forming an NMOS transistor in the isolated NMOS device region, and a PMOS transistor in the isolated PMOS device region; forming a first extrinsic base region in the isolated bipolar device region; forming an oxide layer over the substrate; forming a shallow trench in the oxide and in the isolated bipolar device region of the substrate, wherein the shallow trench is etched slightly shallower than the depth of the first extrinsic base region and slightly overlapping the first extrinsic base region; forming an active base region in the substrate at the bottom of the shallow trench; forming sidewall spacers in the shallow trench opening; and forming a polysilicon emitter region self-aligned in the shallow trench.

Claim 8

A method of fabricating a bipolar transistor of a BiCMOS integrated circuit, comprising the steps of: providing a semiconductor substrate; forming at least an isolated NMOS device region, at least an isolated PMOS device region and at least an isolated bipolar device region in the substrate; forming an NMOS transistor in the isolated NMOS device region, and a PMOS transistor in the isolated PMOS device region; forming a first extrinsic base region in the isolated bipolar device region; forming an oxide layer over the substrate; forming a shallow trench in the oxide and in the isolated bipolar device region of the substrate, wherein the shallow trench is etched slightly shallower than the depth of the first extrinsic base region and slightly overlapping the first extrinsic base region; forming an active base region in the substrate at the bottom of the shallow trench; forming sidewall spacers in the shallow trench opening; and forming a polysilicon emitter region self-aligned in the shallow trench.

Claim 12

A method of fabricating a BiCMOS integrated circuit, comprising the steps of: providing a semiconductor substrate; forming at least an isolated NMOS device region, at least an isolated PMOS device region and at least an isolated bipolar device region in the substrate; forming a deep collector region in the isolated bipolar device region; forming a gate oxide layer and a polysilicon layer over the substrate; etching the polysilicon layer to form polysilicon gate regions over the isolated NMOS device region and over the isolated PMOS device region; forming a first source region and a first drain region in the isolated NMOS device region, and forming a first top contact collector region partially overlapping the deep collector region; forming a second source region and a second drain region in the isolated PMOS device region, and forming a first extrinsic base region in the isolated bipolar device region; forming sidewall spacers adjacent to the polysilicon gate regions; forming a third source and a third drain region in the first source and first drain regions to create lightly doped source and drain regions, and forming a second top contact collector region in the first top contact collector region; forming a fourth source and a fourth drain region in the second source and second drain regions to create laterally doped source and drain regions, and forming a second extrinsic base region in the first extrinsic base region; forming an oxide layer over the substrate; forming a shallow trench in the oxide and in the isolated bipolar device region of the substrate, wherein the shallow trench is etched slightly shallower than the depth of the first extrinsic base region, but slightly deeper than the second extrinsic base region and slightly overlapping the first and the second extrinsic base regions; forming an active base region in the substrate at the bottom of the shallow trench; forming an oxide sidewall spacer in the shallow trench; and forming a doped polysilicon emitter region self-aligned in the shallow trench.

Claim 13

A method of fabricating a BiCMOS integrated circuit, comprising the steps of: providing a semiconductor substrate; forming at least an isolated NMOS device region, at least an isolated PMOS device region and at least an isolated bipolar device region in the substrate; forming a deep collector region in the isolated bipolar device region; forming a gate oxide layer and a polysilicon layer over the substrate; etching the polysilicon layer to form polysilicon gate regions over the isolated NMOS device region and over the isolated PMOS device region; forming a first source region and a first drain region in the isolated NMOS device region, and forming a first top contact collector region partially overlapping the deep collector region; forming a second source region and a second drain region in the isolated PMOS device region, and forming a first extrinsic base region in the isolated bipolar device region; forming sidewall spacers adjacent to the polysilicon gate regions; forming a third source and a third drain region in the first source and first drain regions to create lightly doped source and drain regions, and forming a second top contact collector region in the first top contact collector region; forming a fourth source and a fourth drain region in the second source and second drain regions to create laterally doped source and drain regions, and forming a second extrinsic base region in the first extrinsic base region; forming an oxide layer over the substrate; forming a shallow trench in the oxide and in the isolated bipolar device region of the substrate, wherein the shallow trench is etched slightly shallower than the depth of the first extrinsic base region, but slightly deeper than the second extrinsic base region and slightly overlapping the first and the second extrinsic base regions; forming an active base region in the substrate at the bottom of the shallow trench; forming an oxide sidewall spacer in the shallow trench; and forming a doped polysilicon emitter region self-aligned in the shallow trench.

Claim 16

A method of providing a bipolar transistor in a BiCMOS integrated circuit, comprising the steps of: providing a substrate having a buried layer which serves as a collector; forming a first extrinsic base region in the substrate; etching a shallow trench into the first extrinsic base region; forming an active base in the substrate at the bottom of the shallow trench; forming sidewall spacers along walls of the shallow trench; and forming an emitter in the shallow trench which reaches to the bottom of the shallow trench and makes contact with the active base.

Claim 17

A method of providing a bipolar transistor in a BiCMOS integrated circuit, comprising the steps of: providing a substrate having a buried layer which serves as a collector; forming a first extrinsic base region in the substrate; etching a shallow trench into the first extrinsic base region; forming an active base in the substrate at the bottom of the shallow trench; forming sidewall spacers along walls of the shallow trench; and forming an emitter in the shallow trench which reaches to the bottom of the shallow trench and makes contact with the active base.