Processing apparatus with hierarchical structure for implementing a machine instruction

Claim 1

A processing apparatus with a function hierarchical structure, said apparatus being formed on one chip of a highly integrated semiconductor device, and comprising: means for decoding a machine instruction having an operation code field designating a function to be executed with a hierarchical structure corresponding to functional levels, and an operation object field, with a hierarchical structure corresponding to that of said operation code field, designating an object for which the function designated by the operation code field is executed, wherein the operation code includes a task level operation code, and at least one of a control structure level operation code, an operation level operation code, and a basic level operation code, and the operation object field includes task level data, and at leas tone of control condition data, arithmetic object data, and basic level data; a plurality of functional block means, connected to the machine instruction decoding means and having a hierarchical structure including a higher functional level functional block means and a plurality of lower functional level functional block means, for executing said function designated by said operation code field, wherein said higher functional level functional block means includes a task level functional block means, and wherein said plurality of lower functional level functional block means includes at least one of a control structure level functional block means coupled to said task level functional block means and having a lower functional level than said task level functional block means, an operation level functional block means having a lower functional level than the task and the control structure functional block means and coupled to a higher level functional block means, and a basic level functional block means, having a lower functional level than the task, the control, and the operation level functional block means and coupled to a higher level functional block means, and wherein each of said plurality of functional block means includes: (a) an operation object circuit for executing a processing operation on one of the task level, the control structure level, the operation level, and the basic level, (b) an operation logic circuit for controlling said operation object circuit, (c) encoding means for receiving a machine instruction from a block means having a higher functional level, for encoding from said machine instruction at least block identification data and process data indicating a processing operation, and for selectively supplying the encoded block identification data and process data to a lower functional level functional block means; and (d) decoder means for decoding encoded block identification data and process data supplied from a functional block means at a higher functional level.