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US4894752A Expired / Lapsed US ⏱️ 0.0 years remaining

Lead frame for a semiconductor device

Assignee: Shinko Electric Industries Co Ltd
•
Filing: 1988-07-14
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Granted: 1990-01-16
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Expires: 2008-07-14
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Abstract

Abstract A lead frame for a semiconductor device includes a metal strip made of copper or copper alloy having a plurality of wire bonding areas to which metal wires are directly connected by a direct bonding method. The wire bonding areas are electroplated with a thin silver film or a palladium film, so that formation of a copper oxidized film on the wire bonding area is substantially prevented.

Inventors

  • 👤 Akihiko Murata
  • 👤 Toshihiko Shimada

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-01 00:46
CPC Classifications
H; H10; H10W; H10W70/00; H10W70/40; H10W70/456; H10W70/457; H10W72/00; H10W72/50; H10W90/00; H10W90/811; H10W72/071; H10W72/075; H10W72/541; H10W72/5449; H10W72/551; H10W72/552; H10W72/5522; H10W72/5524; H10W72/5525; H10W72/59; H10W72/90; H10W72/931; H10W72/932; H10W72/951; H10W72/952; H10W90/701; H10W90/751; H10W90/756; Y; Y10; Y10T; Y10T428/00; Y10T428/12; Y10T428/12493; Y10T428/12771; Y10T428/12861; Y10T428/12868; Y10T428/12875; Y10T428/12882; Y10T428/12896

Claims Analysis

Total Claims: 11
Claim 1
Independent Claim 107 words
A lead frame for mounting a semiconductor chip having a plurality of connecting terminals, comprising: upper and lower guide rails; a die pad on which the semiconductor chip is mountable; a plurality of leads coupled to the upper and lower guide rails and being disposed around said die pad; each of said leads having a tip defining a wire bonding area which is connectable with a wire to a corresponding connecting terminal of said semiconductor chip when mounted on said die pad; and a thin silver film plating having a thickness in a range between a molecular level to about 0.1 μm, covering the entire lead frame.
Claim 2
Dependent Claim 107 words
A lead frame for mounting a semiconductor chip having a plurality of connecting terminals, comprising: upper and lower guide rails; a die pad on which the semiconductor chip is mountable; a plurality of leads coupled to the upper and lower guide rails and being disposed around said die pad; each of said leads having a tip defining a wire bonding area which is connectable with a wire to a corresponding connecting terminal of said semiconductor chip when mounted on said die pad; and a thin silver film plating having a thickness in a range between a molecular level to about 0.1 μm, covering the entire lead frame.
Claim 3
Dependent Claim 28 words
A lead frame as set forth in claim 1, wherein said lead frame is made of a material selected from the group consisting of copper and copper alloy.
Claim 4
Dependent Claim 36 words
A lead frame as set forth in claim 1, wherein said thin silver film comprises a plating solution including 10 gW/1 of the potassium silver cyanide KAg(CN) 2 , and 5 gW/1 of potassium cyanide, KCN.
Claim 5
Dependent Claim 70 words
A lead frame for a semiconductor device comprising: a metal strip made of a material selected from the group consisting of copper and copper alloy and having a plurality of wire bonding areas to which metal wires are directly connectable by a direct bonding method; and a thin silver film plating having a thickness in a range between a molecular level to about 0.1 μm, covering the entire lead frame.
Claim 6
Dependent Claim 70 words
A lead frame for a semiconductor device comprising: a metal strip made of a material selected from the group consisting of copper and copper alloy and having a plurality of wire bonding areas to which metal wires are directly connectable by a direct bonding method; and a thin silver film plating having a thickness in a range between a molecular level to about 0.1 μm, covering the entire lead frame.
Claim 7
Dependent Claim 107 words
A lead frame for mounting a semiconductor chip having a plurality of connecting terminals comprising: upper and lower guide rails; a die pad on which the semiconductor chip is mountable; a plurality of leads coupled to the upper and lower guide rails and being disposed around said die pad; each of said leads having a tip defining a wire bonding area which is connectable with a wire to a corresponding connecting terminal of said semiconductor chip when mounted on the die pad; and a thin palladium film plating having a thickness in a range between a molecular level to about 0.1 μm, covering the entire lead frame.
Claim 8
Dependent Claim 107 words
A lead frame for mounting a semiconductor chip having a plurality of connecting terminals comprising: upper and lower guide rails; a die pad on which the semiconductor chip is mountable; a plurality of leads coupled to the upper and lower guide rails and being disposed around said die pad; each of said leads having a tip defining a wire bonding area which is connectable with a wire to a corresponding connecting terminal of said semiconductor chip when mounted on the die pad; and a thin palladium film plating having a thickness in a range between a molecular level to about 0.1 μm, covering the entire lead frame.
Claim 9
Dependent Claim 28 words
A lead frame as set forth in claim 5, wherein said lead frame is made of a material selected from the group consisting of copper and copper alloy.
Claim 10
Dependent Claim 70 words
A lead frame for a semiconductor device comprising: a metal strip made of a material selected from the group consisting of copper and copper alloy and having a plurality of wire bonding areas to which metal wires are directly connectable by a direct bonding method; and a thin palladium film plating having a thickness in a range between a molecular level to about 0.1 μm, covering the entire lead frame.
Claim 11
Dependent Claim 70 words
A lead frame for a semiconductor device comprising: a metal strip made of a material selected from the group consisting of copper and copper alloy and having a plurality of wire bonding areas to which metal wires are directly connectable by a direct bonding method; and a thin palladium film plating having a thickness in a range between a molecular level to about 0.1 μm, covering the entire lead frame.

References Cited (Backward Citations)

US3860835A Cited
US4182781A Cited
US4628149A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1993-01-15 1993-07-17 1994-01-16 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1997-01-15 1997-07-17 1998-01-16 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2001-01-15 2001-07-17 2002-01-16 $7700.00 Window Closed / Lapsed

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