Protected MOS transistor circuit

Claim 1

A protected MOS transistor circuit comprising: a semiconductor substrate with a top surface; an input terminal supplied with an input voltage signal; an input MOS transistor including an insulated gate and also including source and drain regions formed in the top surface of said semiconductor substrate; an impurity-doped semiconductor layer insulatively formed over said top surface of said substrate and connected between said input terminal and said insulated gate of said input MOS transistor, said semiconductor layer acting as a transfer line for transferring said input voltage signal to the insulated gate of said input MOS transistor; first diode means connected in a reverse-biased orientation between a power source terminal and a first portion of said semiconductor layer; and second diode means also connected in the reverse-biased orientation between said power source terminal and a second portion of said semiconductor layer which is located closer to said input terminal than said first portion of said semiconductor layer, said second diode means having a diffusion region formed in the top surface of said semiconductor substrate and extending laterally in a transverse direction to said semiconductor layer such that said diffusion region is longer in a transversal direction of said semiconductor layer than in a longitudinal direction of said layer, said diffusion region, together with said semiconductor substrate, constituting a pn junction; wherein said second portion of said semiconductor layer is elongated in the transversal direction of said semiconductor layer and contacts substantially the entire top surface of said diffusion region.