US4890150A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Dielectric passivation
Assignee: Philips North America LLC
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Filing: 1985-12-05
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Granted: 1989-12-26
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Expires: 2005-12-05
Abstract
Abstract A high-voltage semiconductor device is set forth having a passivation scheme able to shelter the device from both external charges and internal charges. In particular, the distribution of electric fields in the device is altered to make it less vulnerable to the presence of internal charges.
Inventors
- 👤 Eduardo S. Vera
- 👤 Edward H. Stupp
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-07 14:39
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60; H10D30/64; H10D30/65; H10D64/00; H10D64/118; H10W; H10W72/00; H10W72/90
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
58 words
A semiconductor device comprising a substrate layer of a first conductivity type, an epitaxial layer of a second conductivity type overlying said substrate layer, an insulator layer covering at least a portion of said epitaxial layer, and a passivating layer of a high dielectric constant on said insulating layer, said high dielectric constant being at least approximately 80.
Claim 2
Dependent Claim
58 words
A semiconductor device comprising a substrate layer of a first conductivity type, an epitaxial layer of a second conductivity type overlying said substrate layer, an insulator layer covering at least a portion of said epitaxial layer, and a passivating layer of a high dielectric constant on said insulating layer, said high dielectric constant being at least approximately 80.
Claim 3
Dependent Claim
18 words
A semiconductor device according to claim 1, wherein said passivating layer has a thickness of approximately 1 micron.
Claim 4
Dependent Claim
18 words
A semiconductor device according to claim 1 or claim 2, wherein said passivating layer is TiO 2 .
Claim 5
Dependent Claim
21 words
A semiconductor device according to claim 1 or claim 2, wherein said passivating layer has a dielectric constant of approximately 80.
Claim 6
Dependent Claim
142 words
A semiconductor device comprising a substrate layer of a first conductivity type; an epitaxial layer of a second conductivity type overlying said substrate layer; a buried layer lying between a portion of said substrate layer and said epitaxial layer, said buried layer having a higher doping of said first conductivity type; a first surface layer of said first conductivity type at a portion of said epitaxial layer above said buried layer; a second surface layer of said second conductivity type at another portion of said epitaxial layer free from said buried layer; an insulating layer over a portion of said epitaxial layer and said first and second surface layers; a passivating layer of a high dielectric constant on a portion of said insulating layer; and an electrode layer on at least portions of said insulating layer and edges of said passivating layer.
Claim 7
Dependent Claim
142 words
A semiconductor device comprising a substrate layer of a first conductivity type; an epitaxial layer of a second conductivity type overlying said substrate layer; a buried layer lying between a portion of said substrate layer and said epitaxial layer, said buried layer having a higher doping of said first conductivity type; a first surface layer of said first conductivity type at a portion of said epitaxial layer above said buried layer; a second surface layer of said second conductivity type at another portion of said epitaxial layer free from said buried layer; an insulating layer over a portion of said epitaxial layer and said first and second surface layers; a passivating layer of a high dielectric constant on a portion of said insulating layer; and an electrode layer on at least portions of said insulating layer and edges of said passivating layer.
Claim 8
Dependent Claim
18 words
A semiconductor device according to claim 5, wherein said passivating layer has a thickness of approximately 1 micron.
Claim 9
Dependent Claim
18 words
A semiconductor device according to claim 5 or claim 6, wherein said passivating layer is TiO 2 .
Claim 10
Dependent Claim
21 words
A semiconductor layer according to claim 5 or claim 6, wherein said passivating layer has a dielectric constant of approximately 80.
Claim 11
Dependent Claim
25 words
A semiconductor device according to claim 1 or claim 2, wherein said passivating layer has a dielectric constant of approximately one of 800 or 8000.
Claim 12
Dependent Claim
25 words
A semiconductor device according to claim 5 or claim 6, wherein said passivating layer has a dielectric constant of approximately one of 800 or 8000.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1992-12-25 | 1993-06-26 | 1993-12-26 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1996-12-25 | 1997-06-26 | 1997-12-26 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2000-12-25 | 2001-06-26 | 2001-12-26 | $7700.00 | Window Closed / Lapsed |