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US4890147A Expired / Lapsed US ⏱️ 0.0 years remaining

Through-field implant isolated devices and method

Assignee: Texas Instruments Inc
•
Filing: 1987-04-15
•
Granted: 1989-12-26
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Expires: 2007-04-15
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Abstract

Abstract Preferred embodiments include channel stop implants for CMOS devices by through field boron implants (152) after the field oxide (144, 145) has been grown and with the implant depth determined by the thin portions of the field oxide (145). Junction (154) breakdown is preserved by channeling the implant (152) to penetrate far below the junctions (154).

Inventors

  • 👤 Clarence W. Teng
  • 👤 Roger A. Haken

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 14:12
CPC Classifications
H; H10; H10P; H10P30/00; H10P30/20; H10P30/202; H10P30/204; H10P30/21; H10P30/212; H10W; H10W10/00; H10W10/01; H10W10/011; H10W10/012; H10W10/0125; H10W10/0126; H10W10/10; H10W10/13

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 106 words
An integrated semiconductor circuit comprising: a semiconductor substrate; a first and a second field oxide region extending a first and a second distance, respectively, into said semiconductor substrate, wherein said first distance is less than said second distance; a device region in said semiconductor substrate separating said first and second field oxide regions; a substantially continuous layer of dopant extending through said first and second field oxide regions and through said substrate beneath said device region, wherein said layer of dopant has a peak concentration of dopant which is located substantially at said first distance into said substrate in said first and second field oxide regions.
Claim 2
Dependent Claim 106 words
An integrated semiconductor circuit comprising: a semiconductor substrate; a first and a second field oxide region extending a first and a second distance, respectively, into said semiconductor substrate, wherein said first distance is less than said second distance; a device region in said semiconductor substrate separating said first and second field oxide regions; a substantially continuous layer of dopant extending through said first and second field oxide regions and through said substrate beneath said device region, wherein said layer of dopant has a peak concentration of dopant which is located substantially at said first distance into said substrate in said first and second field oxide regions.
Claim 3
Dependent Claim 36 words
The circuit of claim 1 wherein said peak concentration of dopant below said device region is located substantially at a range equal to a mean range obtained by on-axis implantation of said dopant in said substrate.
Claim 4
Dependent Claim 17 words
The circuit of claim 1 wherein said substrate is <100> crystalline silicon and said dopant is boron.

References Cited (Backward Citations)

US4716451A Cited
US4505027A Cited
US4697332A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1992-12-25 1993-06-26 1993-12-26 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1996-12-25 1997-06-26 1997-12-26 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2000-12-25 2001-06-26 2001-12-26 $7700.00 Window Closed / Lapsed

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