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US4697332A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of making tri-well CMOS by self-aligned process

Assignee: American Microsystems Holding Corp
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Filing: 1985-09-20
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Granted: 1987-10-06
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Expires: 2005-09-20
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Abstract

Abstract A semiconductor structure having at least three types of wells which may be of different doping levels and methods of manufacturing such a structure, are disclosed. In one method, regions which will become active devices are protected with a nitride layer as the associated well-regions are implanted. In another method, previously implanted wells are covered with thick oxide which in combination with the nitride layer provides automatic alignment of adjacent wells. In yet another method, implanted wells are covered with oxide while a last well is implanted with this last well being defined by both thick oxide and photoresist. All methods avoid a masking step and avoid the need for aligning the edge of a later photoresist mask with the edge of an earlier photoresist mask. The structures formed by these methods may have heavily-doped P wells, heavily-doped N wells, and lightly-doped P or N wells, or both, for forming higher breakdown voltage devices on the same chip with lower breakdown voltage devices.

Inventors

  • 👤 Richard C. Joy
  • 👤 Tarsaim L. Batra

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 20:57
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/80; H10D84/82; H10D84/83; H10D84/85; H10D84/859; H10D84/01; H10D84/0123; H10D84/0126; H10D84/0165; H10D84/0191; H10D84/02; H10D84/03; H10D84/038; Y; Y10; Y10S; Y10S148/00; Y10S148/082

Claims Analysis

Total Claims: 17
Claim 1
Independent Claim 163 words
A method of forming wells in a semiconductor substrate comprising: depositing a thin layer of oxide on said substrate, depositing a layer of silicon nitride on said thin layer of oxide, initiating a process to be repeated at least two times in the stated order of: applying a layer of photoresist, removing portions of said photoresist, thereby exposing portions of said silicon nitride, removing exposed portions of said silicon nitride and thin oxide, thus creating exposed portions of said semiconductor substrate, implanting dopants of a selected conductivity type to a selected concentration into said exposed portions of said semiconductor substrate, thereby forming a well of said selected conductivity type having a breakdown voltage determined by said selected concentration, oxidizing said exposed portions of semiconductor substrate thus creating protective thick oxide over said exposed portions and diffusing said dopants into said semiconductor substrate, and after sufficient repetition of said process, when the desired number of regions have been formed, removing said protective thick oxide.
Claim 2
Independent Claim 163 words
A method of forming wells in a semiconductor substrate comprising: depositing a thin layer of oxide on said substrate, depositing a layer of silicon nitride on said thin layer of oxide, initiating a process to be repeated at least two times in the stated order of: applying a layer of photoresist, removing portions of said photoresist, thereby exposing portions of said silicon nitride, removing exposed portions of said silicon nitride and thin oxide, thus creating exposed portions of said semiconductor substrate, implanting dopants of a selected conductivity type to a selected concentration into said exposed portions of said semiconductor substrate, thereby forming a well of said selected conductivity type having a breakdown voltage determined by said selected concentration, oxidizing said exposed portions of semiconductor substrate thus creating protective thick oxide over said exposed portions and diffusing said dopants into said semiconductor substrate, and after sufficient repetition of said process, when the desired number of regions have been formed, removing said protective thick oxide.
Claim 3
Dependent Claim 27 words
A method for forming wells in a semiconductor substrate as in claim 1, where said process to be repeated at least two times is repeated three times.
Claim 4
Dependent Claim 27 words
A method for forming wells in a semiconductor substrate as in claim 1 wherein said first conductivity type is N and said second conductivity type is P.
Claim 5
Dependent Claim 27 words
A method for forming wells in a semiconductor substrate as in claim 1 wherein said first conductivity type is P and said second conductivity type is N.
Claim 6
Dependent Claim 44 words
A method for forming wells in a semiconductor substrate as in claim 1 where in subsequent repetitions of said process, said step of removing portions of said photoresist may also expose portions of said protective thick oxide, thus providing automatic alignment of adjacent wells.
Claim 7
Dependent Claim 33 words
A method for forming wells in a semiconductor substrate as in claim 3 wherein said dopants of said first conductivity type are phosphorous and said dopants of said second conductivity type are boron.
Claim 8
Dependent Claim 33 words
A method for forming wells in a semiconductor substrate as in claim 4 wherein said dopants of said first conductivity type are boron and said dopants of said second conductivity type are phosphorous.
Claim 9
Independent Claim 243 words
A method of forming wells in a semiconductor substrate comprising: depositing a thin layer of oxide on said substrate, depositing a layer of silicon nitride on said thin layer of oxide, initiating a process to be repeated at least one time of: applying a layer of photoresist, removing portions of said photoresist, thereby exposing portions of said silicon nitride, removing exposed portions of said silicon nitride and thin oxide, thus creating exposed portions of said semiconductor substrate, implanting dopants of a selected conductivity type to a selected concentration into said exposed portions of said semiconductor substrate, thereby forming a well of said selected conductivity type having a breakdown voltage determined by said selected concentration, oxidizing said exposed portions of semiconductor substrate, thus creating protective thick oxide over said exposed portions and diffusing said dopants into said semiconductor substrate, and after sufficient repetition of said process, when one well region remains to be formed, applying a layer of photoresist, removing portions of said photoresist, thereby creating exposed portions of said silicon nitride, implanting through said exposed portions of silicon nitride and said thin layer of oxide dopants of a selected conductivity type to a selected concentration into said semiconductor substrate, thereby forming a well of said selected conductivity type having a breakdown voltage determined by said selected concentration, diffusing said dopants of a selected conductivity type into said semiconductor substrate, removing said layer of silicon nitride and said thin and thick layers of oxide.
Claim 10
Independent Claim 243 words
A method of forming wells in a semiconductor substrate comprising: depositing a thin layer of oxide on said substrate, depositing a layer of silicon nitride on said thin layer of oxide, initiating a process to be repeated at least one time of: applying a layer of photoresist, removing portions of said photoresist, thereby exposing portions of said silicon nitride, removing exposed portions of said silicon nitride and thin oxide, thus creating exposed portions of said semiconductor substrate, implanting dopants of a selected conductivity type to a selected concentration into said exposed portions of said semiconductor substrate, thereby forming a well of said selected conductivity type having a breakdown voltage determined by said selected concentration, oxidizing said exposed portions of semiconductor substrate, thus creating protective thick oxide over said exposed portions and diffusing said dopants into said semiconductor substrate, and after sufficient repetition of said process, when one well region remains to be formed, applying a layer of photoresist, removing portions of said photoresist, thereby creating exposed portions of said silicon nitride, implanting through said exposed portions of silicon nitride and said thin layer of oxide dopants of a selected conductivity type to a selected concentration into said semiconductor substrate, thereby forming a well of said selected conductivity type having a breakdown voltage determined by said selected concentration, diffusing said dopants of a selected conductivity type into said semiconductor substrate, removing said layer of silicon nitride and said thin and thick layers of oxide.
Claim 11
Dependent Claim 27 words
A method for forming wells in a semiconductor substrate as in claim 8, where said process to be repeated at least one time is repeated one time.
Claim 12
Dependent Claim 27 words
A method for forming wells in a semiconductor substrate as in claim 8, where said process to be repeated at least one time is repeated two times.
Claim 13
Dependent Claim 27 words
A method for forming wells in a semiconductor substrate as in claim 8, where said first conductivity type is N and said second conductivity type is P.
Claim 14
Dependent Claim 26 words
A method for forming wells in a semiconductor substrate as in claim 8, wherein said first conductivity type is P and second conductivity type is N.
Claim 15
Dependent Claim 45 words
A method for forming wells in a semiconductor substrate as in claim 8, where said steps of removing portions of said photoresist thereby exposing portions of said silicon nitride may also expose portions of said protective thick oxide, thus providing automatic alignment of adjacent wells.
Claim 16
Dependent Claim 33 words
A method for forming wells in a semiconductor substrate as in claim 11, wherein said dopants of said first conductivity type are phosphorous and said dopants of said second conductivity type are boron.
Claim 17
Dependent Claim 33 words
A method for forming wells in a semiconductor substrate as in claim 12, wherein said dopants of said first conductivity type are boron and said dopants of said second conductivity type are phosphorous.

References Cited (Backward Citations)

EP0091256A2 Cited
US4601098A Cited
US4554726A Cited
US4584027A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1990-10-05 1991-04-06 1991-10-06 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1994-10-05 1995-04-06 1995-10-06 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1998-10-05 1999-04-06 1999-10-06 $7700.00 Window Closed / Lapsed

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