Abstract A transistor arrangement, particularly for the fast switching of inductive loads, includes a driving first transistor and a power output second transistor (T1, T2) interconnected as a Darlington pair having a base terminal, an emitter terminal and a collector terminal. A third transistor (T3) has its collector connected to the base of the first transistor (T1) and its emitter connected to the emitter terminal (E). A fourth transistor (T4) of a conductivity type opposite to that of the first, second and third transistors has its base connected to the collector terminal, its emitter connected to the base terminal, and its collector connected to the base of the third transistor (T3). This structure is particularly suited for a monolithic integration.
Transistor arrangement, particularly for the fast switching of inductive loads, comprising a first transistor (T1) and a second transistor (T2) interconnected as a Darlington pair having a base terminal, an emitter terminal and a collector terminal; a third transistor (T3) having its collector connected to the base of the first transistor (T1) and its emitter connected to the emitter terminal (E); and a fourth transistor (T4) of a conductivity type opposite to that of the first, second and third transistors and having its base connected to the collector terminal (C), its emitter connected to the base terminal (B), and its collector connected to the base of the third transistor (T3).
Claim 2
Dependent Claim
110 words
Transistor arrangement, particularly for the fast switching of inductive loads, comprising a first transistor (T1) and a second transistor (T2) interconnected as a Darlington pair having a base terminal, an emitter terminal and a collector terminal; a third transistor (T3) having its collector connected to the base of the first transistor (T1) and its emitter connected to the emitter terminal (E); and a fourth transistor (T4) of a conductivity type opposite to that of the first, second and third transistors and having its base connected to the collector terminal (C), its emitter connected to the base terminal (B), and its collector connected to the base of the third transistor (T3).
Claim 3
Dependent Claim
26 words
Transistor arrangement according to claim 1, wherein a protective resistor (R3) is connected between the collector of the third transistor (T3) and the base terminal (B).
Claim 4
Dependent Claim
24 words
Transistor arrangement according to claim 2, wherein the first transistor (T1) is a driver transistor and the second transistor (T2) is a power transistor.
Claim 5
Dependent Claim
26 words
Transistor arrangement according to claim 3, wherein an auxiliary resistor (R1, R2) is connected in parallel to each of the base-emitter diodes of the Darlington pair.