US4870530A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Electrostatic discharge protection circuitry for any two external pins of an I.C. package
Assignee: Microsemi Semiconductor US Inc
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Filing: 1988-06-27
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Granted: 1989-09-26
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Expires: 2008-06-27
Abstract
Abstract A protective circuit for bipolar integrated circuits to prevent inadvertent damage caused by electrostatic discharge includes a plurality of clamping networks (12a-12n). Each of the plurality of clamping networks (12a-12n). is connected between a corresponding one of a number of external input/output pins (P1-Pn) of the integrated circuit and a common bus line (14) which is connected to an external substrate pin (PS). Each of the plurality of clamping networks (12a-12n) includes a silicon-controlled rectifier (T1), a diode (D1), a first resistor (R1) and a second resistor (R2). When any one of the number of external input/output pins (P1-Pn) receives a voltage higher than a predeter-mined value and any remaining one of the external input/output pins (P1-Pn) contacts a ground potential, a discharge path is formed by a single silicon-controlled rectifier and a single diode so as to protect an internal circuit portion.
Inventors
- 👤 Roger S. Hurst
- 👤 Glen Gilfeather
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 21:07
CPC Classifications
H; H10; H10D; H10D89/00; H10D89/60
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
344 words
A protection circuit for bipolar integrated circuits to prevent inadvertent damage caused by electrostatic discharge, comprising: a plurality of clamping networks (12a-12n), each of said plurality of clamping networks (12a-12n) being connected between a corresponding one of a number of external input/output pins (P1-Pn) of the integrated circuit and a common bus line (14) which is connected to an external substrate pin (PS); each of said plurality of clamping networks (12a-12n) including a silicon-controlled rectifier (T1), a diode (D1), a first resistor (R1), and a second resistor (R2); said silicon-controlled rectifier (T1) being formed of a PNP-type bipolar transistor (Q1) and an NPN-type bipolar transistor (Q2), said PNP-type transistor (Q1) having its emitter connected to the corresponding external input/output pin, its base connected to the collector of said NPN-type transistor (Q2) at a corresponding node, and its collector connected to the base of said NPN-type transistor (Q2), said NPN-type transistor (Q2) having its emitter connected to the common bus line(14); said diode (D1) having its cathode connected to the emitter of said PNP-type transistor (Q1) and its anode connected to the common bus line (14); said first resistor (R1) having its one end connected to the emitter of said PNP-type transistor (Q1) and its other connected to the base of said PNP-type transistor (Q1); said second resistor (R2) having its one end connected to the base of said NPN-type transistor (Q2) and its other end connected to the emitter of said NPN-type transistor (Q1); and internal circuit portions to be protected from the electrostatic discharge being connected between a respective one of the corresponding nodes and the common bus line (14). whereby when any one of the number of external input/output pins (P1-Pn) receives a voltage higher than a predetermined value and another remaining one of the external input/output pine (P1-Pn) contacts a ground potential a discharge path is formed by a single silicon-controlled rectifier in one of said plurality of clamping networks and a single diode in another one of said plurality of clamping networks so as to protect said internal circit portions.
Claim 2
Dependent Claim
344 words
A protection circuit for bipolar integrated circuits to prevent inadvertent damage caused by electrostatic discharge, comprising: a plurality of clamping networks (12a-12n), each of said plurality of clamping networks (12a-12n) being connected between a corresponding one of a number of external input/output pins (P1-Pn) of the integrated circuit and a common bus line (14) which is connected to an external substrate pin (PS); each of said plurality of clamping networks (12a-12n) including a silicon-controlled rectifier (T1), a diode (D1), a first resistor (R1), and a second resistor (R2); said silicon-controlled rectifier (T1) being formed of a PNP-type bipolar transistor (Q1) and an NPN-type bipolar transistor (Q2), said PNP-type transistor (Q1) having its emitter connected to the corresponding external input/output pin, its base connected to the collector of said NPN-type transistor (Q2) at a corresponding node, and its collector connected to the base of said NPN-type transistor (Q2), said NPN-type transistor (Q2) having its emitter connected to the common bus line(14); said diode (D1) having its cathode connected to the emitter of said PNP-type transistor (Q1) and its anode connected to the common bus line (14); said first resistor (R1) having its one end connected to the emitter of said PNP-type transistor (Q1) and its other connected to the base of said PNP-type transistor (Q1); said second resistor (R2) having its one end connected to the base of said NPN-type transistor (Q2) and its other end connected to the emitter of said NPN-type transistor (Q1); and internal circuit portions to be protected from the electrostatic discharge being connected between a respective one of the corresponding nodes and the common bus line (14). whereby when any one of the number of external input/output pins (P1-Pn) receives a voltage higher than a predetermined value and another remaining one of the external input/output pine (P1-Pn) contacts a ground potential a discharge path is formed by a single silicon-controlled rectifier in one of said plurality of clamping networks and a single diode in another one of said plurality of clamping networks so as to protect said internal circit portions.
Claim 3
Dependent Claim
40 words
A protection circuit as claimed in claim 1, wherein said first resistor (R1) serves as a trigger resistor for controlling the turning on of the silicon-controlled rectifier (T1) when the internal circuit portion to be protected has a low impedance.
Claim 4
Dependent Claim
36 words
A protection circuit as claimed in claim 2, wherein said second resistor (R2) serves as a gain-limiting resistor so as to prevent triggering of the silicon-controlled rectifier (T1) at low voltages during a fast voltage transient.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1992-09-25 | 1993-03-27 | 1993-09-26 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1996-09-25 | 1997-03-27 | 1997-09-26 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2000-09-25 | 2001-03-27 | 2001-09-26 | $7700.00 | Window Closed / Lapsed |