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US4868855A Expired / Lapsed US ⏱️ 0.0 years remaining

Charge-coupled semiconductor device and image sensor device of high information density

Assignee: US Philips Corp
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Filing: 1984-05-31
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Granted: 1989-09-19
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Expires: 2004-05-31
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Abstract

Abstract In a CCD, especially in an image sensing device, the electrodes of the sensor part and the memory part can be switched between a reference level signal and clock pulse signals. As a result, the information density and hence in the image sensor device the number of image lines to be read out independently can be doubled. Thus, the resolution is improved and it is possible to record even and odd lines simultaneously (for example, for an electronic still camera).

Inventors

  • 👤 Arnoldus J. J. Boudewijns
  • 👤 Marnix G. Collet

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-07 14:32
CPC Classifications
H; H10; H10F; H10F39/00; H10F39/10; H10F39/12; H10F39/15; H10F39/153; H04; H04N; H04N25/00; H04N25/70; H04N25/71; H04N25/72; H04N25/745

Claims Analysis

Total Claims: 12
Claim 1
Independent Claim 203 words
A charge coupled device comprising: a semiconductor body having a surface-adjoining semiconductor region in which a charge transfer channel for storing and transporting discrete charge packets is defined; a system of electrodes arranged above the charge transfer channel; means for supplying transport clock voltages to the electrodes for transporting the charge packets through the charge transfer channel, said means supplying voltages such that in regions where charge is being transported there is one charge packet for each m successive electrodes, where m is an integer greater than or equal to two; means for supplying storage clock voltages to the electrodes for generating in the charge transfer channel a system of potential wells separated by potential barriers, each potential well being associated with n successive electrodes for storing one charge packet, where n is less than m; and means for switchably connecting the electrodes to the storage clock voltage supply means or to the transport clock voltage supply means, said switchable means connecting the electrodes to the storage clock voltage supply means during storage of charge packets in the charge transfer channel, said switchable means then sequentially reading out the charge packets by sequentially switching the electrodes to the transport clock voltage supply means.
Claim 2
Dependent Claim 203 words
A charge coupled device comprising: a semiconductor body having a surface-adjoining semiconductor region in which a charge transfer channel for storing and transporting discrete charge packets is defined; a system of electrodes arranged above the charge transfer channel; means for supplying transport clock voltages to the electrodes for transporting the charge packets through the charge transfer channel, said means supplying voltages such that in regions where charge is being transported there is one charge packet for each m successive electrodes, where m is an integer greater than or equal to two; means for supplying storage clock voltages to the electrodes for generating in the charge transfer channel a system of potential wells separated by potential barriers, each potential well being associated with n successive electrodes for storing one charge packet, where n is less than m; and means for switchably connecting the electrodes to the storage clock voltage supply means or to the transport clock voltage supply means, said switchable means connecting the electrodes to the storage clock voltage supply means during storage of charge packets in the charge transfer channel, said switchable means then sequentially reading out the charge packets by sequentially switching the electrodes to the transport clock voltage supply means.
Claim 3
Dependent Claim 21 words
A device as claimed in claim 1, characterized in that the switchable means comprises an MOS transistor connector to each electrode.
Claim 4
Dependent Claim 24 words
A device as claimed in claim 2, characterized in that the switchable means further comprises at least one register for controlling the MOS transistors.
Claim 5
Dependent Claim 17 words
A device as claimed in claim 1, characterized in that the storage clock voltages can be varied.
Claim 6
Independent Claim 41 words
A device as claimed in claim I, characterized in that: the charge transfer channel has first and second ends; and the switchable means sequentially switches the electrodes to the transport clock voltage supply means from the first to the second end.
Claim 7
Dependent Claim 207 words
A charge coupled device comprising: a semiconductor body having a surface-adjoining semiconductor region in which a charge transfer channel for storing and transporting discrete charge packets is defined; a system of electrodes arranged above the charge transfer channel; means for supplying transport clock voltages to the electrodes for transporting the charge packets through the charge transfer channel, said means supplying voltages such that in regions where charge is being transported there is one charge packet for each m successive electrodes, where m is an integer greater than or equal to two; means for supplying storage clock voltages to the electrodes for generating in the charge transfer channel a system of potential wells separated by potential barriers, each potential well being associated with n successive electrodes for storing one charge packet, where n is less than m; and means for switchably connecting the electrodes to the storage clock voltage supply means or to the transport clock voltage supply means, said switchable means connecting the electrodes to the transport clock voltage supply means during reading of charge packets into the charge transfer channel, said switchable means then sequentially storing the charge packets in the charge transfer channel by sequentially switching the electrodes to the storage clock voltage supply means.
Claim 8
Dependent Claim 207 words
A charge coupled device comprising: a semiconductor body having a surface-adjoining semiconductor region in which a charge transfer channel for storing and transporting discrete charge packets is defined; a system of electrodes arranged above the charge transfer channel; means for supplying transport clock voltages to the electrodes for transporting the charge packets through the charge transfer channel, said means supplying voltages such that in regions where charge is being transported there is one charge packet for each m successive electrodes, where m is an integer greater than or equal to two; means for supplying storage clock voltages to the electrodes for generating in the charge transfer channel a system of potential wells separated by potential barriers, each potential well being associated with n successive electrodes for storing one charge packet, where n is less than m; and means for switchably connecting the electrodes to the storage clock voltage supply means or to the transport clock voltage supply means, said switchable means connecting the electrodes to the transport clock voltage supply means during reading of charge packets into the charge transfer channel, said switchable means then sequentially storing the charge packets in the charge transfer channel by sequentially switching the electrodes to the storage clock voltage supply means.
Claim 9
Dependent Claim 21 words
A device as claimed in claim 6, characterized in that the switchable means comprises an MOS transistor connected to each electrode.
Claim 10
Dependent Claim 24 words
A device as claimed in claim 7, characterized in that the switchable means further comprises at least one register for controlling the MOS transistors.
Claim 11
Dependent Claim 17 words
A device as claimed in claim 6, characterized in that the storage clock voltages can be varied.
Claim 12
Dependent Claim 58 words
A device as claimed in claim 6, characterized in that: the charge transfer channel has first and second ends; charges are read into the charge transfer channel from the first end; and the switchable means switchably stores charge packets by sequentially switching electrodes to the storage clock voltage supply means from the second end to the first end.

References Cited (Backward Citations)

US3909803A Cited
US3931463A Cited
US3932775A Cited
US4178614A Cited
EP0106286A2 Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1992-09-18 1993-03-20 1993-09-19 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1996-09-18 1997-03-20 1997-09-19 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2000-09-18 2001-03-20 2001-09-19 $7700.00 Window Closed / Lapsed

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