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US4866491A
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Heterojunction field effect transistor having gate threshold voltage capability
Assignee: International Business Machines Corp
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Filing: 1989-01-04
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Granted: 1989-09-12
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Expires: 2009-01-04
Abstract
Abstract A field effect transistor comprising a semiconductor channel region; an undoped semiconductor material region adjacent the channel region; a second semiconductor material region separated from the channel region; and a region of semiconductor material adjacent the second region and having a narrower band gap than the band gap of the region adjacent the channel region; and ohmic contact means to the region having the narrower band gap.
Inventors
- 👤 Paul M. Solomon
- 👤 Thomas N. Theis
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 21:38
CPC Classifications
H; H10; H10D; H10D64/00; H10D64/60; H10D64/602; H10D30/00; H10D30/40; H10D30/47; H10D30/471; H10D30/475; H10D30/4755
Claims Analysis
Total Claims: 21
Claim 1
Independent Claim
180 words
A monocrystalline semiconductor heterojunction field effect transistor having a selectively controlled gate threshold voltage comprising: a substrate having doped source and drain regions with a doping level of ≧10 18 atoms/cm 3 , and a semiconductor channel region located between said source and drain regions; a gate insulator comprising a first undoped semiconductor material region adjacent said channel region and having a wide band gap; a threshold voltage controlling layer comprising a second region of semiconductor material with a narrower band gap than said first undoped semiconductor region and being different from said first undoped semiconductor material region and being separated from said channel region by said gate insulator and being doped with about 10 17 to about 10 19 atoms/cm 3 and being a gate region; a third region of semiconductor material being doped with at least 2×10 18 atoms/cm 3 and being adjacent said threshold voltage controlling voltage layer and having a narrower band gap than the band gap of said threshold voltage controlling layer and being a gate region; and ohmic contact means to said third region.
Claim 2
Dependent Claim
180 words
A monocrystalline semiconductor heterojunction field effect transistor having a selectively controlled gate threshold voltage comprising: a substrate having doped source and drain regions with a doping level of ≧10 18 atoms/cm 3 , and a semiconductor channel region located between said source and drain regions; a gate insulator comprising a first undoped semiconductor material region adjacent said channel region and having a wide band gap; a threshold voltage controlling layer comprising a second region of semiconductor material with a narrower band gap than said first undoped semiconductor region and being different from said first undoped semiconductor material region and being separated from said channel region by said gate insulator and being doped with about 10 17 to about 10 19 atoms/cm 3 and being a gate region; a third region of semiconductor material being doped with at least 2×10 18 atoms/cm 3 and being adjacent said threshold voltage controlling voltage layer and having a narrower band gap than the band gap of said threshold voltage controlling layer and being a gate region; and ohmic contact means to said third region.
Claim 3
Dependent Claim
14 words
The transistor of claim 1 wherein said semiconductor channel region includes a III-V material.
Claim 4
Dependent Claim
12 words
The transistor of claim 2 wherein said III-V material is gallium arsenide.
Claim 5
Dependent Claim
17 words
The transistor of claim 1 wherein said first undoped semiconductor material is of undoped gallium aluminum arsenide.
Claim 6
Dependent Claim
14 words
The transistor of claim 4 wherein said second region is doped gallium aluminum arsenide.
Claim 7
Dependent Claim
27 words
The transistor of claim 1 wherein the first undoped semiconductor material and the second region of semiconductor material contains the same metallic elements in different relative amounts.
Claim 8
Dependent Claim
54 words
The transistor of claim 6 wherein said first undoped semiconductor material is represented by the formula: Al.sub.x Ga.sub.1-x As wherein x is about 0.3 to about 0.6, and said second region is represented by the formula: Al.sub.y Ga.sub.1-y As wherein y is about 0 to about 0.3, and wherein y is less than x.
Claim 9
Dependent Claim
17 words
The transistor of claim 7 wherein said channel region and said third region are of gallium arsenide.
Claim 10
Dependent Claim
31 words
The transistor of claim 1 wherein said threshold voltage controlling layer is about 10 to about 30 nanometers thick and said gate insulator is about 15 to about 100 nanometers thick.
Claim 11
Dependent Claim
17 words
The transistor of claim 9 wherein said third region is about 10 to about 500 nanometers thick.
Claim 12
Dependent Claim
166 words
A monocrystalline semiconductor heterojunction field effect transistor having a selectively controlled gate threshold voltage comprising: a substrate having doped source and drain regions with a doping level of ≧10 18 atoms/cm 3 , and a semiconductor channel region located between said source and drain regions; a gate insulator comprising a first undoped semiconductor material region adjacent said channel region and having a wide band gap; a threshold voltage controlling layer comprising a second undoped region of semiconductor material with a narrower band gap than said first undoped semiconductor region and being different from said first undoped semiconductor material region and being separated from said channel region by said gate insulator and being an insulator; a third region of semiconductor material being doped with at least 2×10 18 atoms/cm 3 and being adjacent said threshold voltage controlling layer and having a narrower band gap than the band gap of said threshold voltage controlling layer and being a gate region; and ohmic contact means to said third region.
Claim 13
Dependent Claim
166 words
A monocrystalline semiconductor heterojunction field effect transistor having a selectively controlled gate threshold voltage comprising: a substrate having doped source and drain regions with a doping level of ≧10 18 atoms/cm 3 , and a semiconductor channel region located between said source and drain regions; a gate insulator comprising a first undoped semiconductor material region adjacent said channel region and having a wide band gap; a threshold voltage controlling layer comprising a second undoped region of semiconductor material with a narrower band gap than said first undoped semiconductor region and being different from said first undoped semiconductor material region and being separated from said channel region by said gate insulator and being an insulator; a third region of semiconductor material being doped with at least 2×10 18 atoms/cm 3 and being adjacent said threshold voltage controlling layer and having a narrower band gap than the band gap of said threshold voltage controlling layer and being a gate region; and ohmic contact means to said third region.
Claim 14
Dependent Claim
14 words
The transistor of claim 11 wherein said semiconductor channel region includes a III-V material.
Claim 15
Dependent Claim
12 words
The transistor of claim 12 wherein said III-V material is gallium arsenide.
Claim 16
Dependent Claim
17 words
The transistor of claim 11 wherein said first undoped semiconductor material is of undoped gallium aluminum arsenide.
Claim 17
Dependent Claim
27 words
The transistor of claim 11 wherein the first undoped semiconductor material and the second region of semiconductor material contains the same metallic elements in different relative amounts.
Claim 18
Dependent Claim
34 words
The transistor of claim 15 wherein said first undoped semiconductor material is represented by the formula: al.sub.x Ga.sub.1-y As wherein y is about 0 to about 0.3, and wherein y is less than x.
Claim 19
Dependent Claim
17 words
The transistor of claim 16 wherein said channel region and said third region are of gallium arsenide.
Claim 20
Dependent Claim
30 words
The transistor of claim 11 wherein said threshold voltage controlling layer is about 10 to 30 nanometers thick and said gate insulator is about 15 to about 100 nanometers thick.
Claim 21
Dependent Claim
17 words
The transistor of claim 18 wherein said third region is about 10 to about 500 nanometers thick.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 1992-09-11 | 1993-03-13 | 1993-09-12 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1996-09-11 | 1997-03-13 | 1997-09-12 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2000-09-11 | 2001-03-13 | 2001-09-12 | $7700.00 | Window Closed / Lapsed |