US4857974A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Circuit comprising conductive lines for the transfer of high-speed signals
Assignee: US Philips Corp
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Filing: 1988-02-16
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Granted: 1989-08-15
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Expires: 2008-02-16
Abstract
Abstract This circuit comprising conductive lines for the transfer of high-speed signals is formed from a semiconductor material in the presence of a two-dimensional gas 2DG between two of its layers (3 and 4). By a suitable choice of the conditions of the temperature and of the magnetic field B, it is then made superconducting, thus permitting the transport of high-speed signals without delay and without distortion of the signals.
Inventors
- 👤 Jean-Noel Patillon
- 👤 Bertrand Gabillard
- 👤 Gerard M. Martin
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 19:45
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/40; H10W20/41; H10W20/44; H10W20/4484; H10D; H10D62/00; H10D62/80; H10D62/82; H10D62/824
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
122 words
Integrated circuit comprising a semiconductor body with a plurality of circuit elements and interconnections between said circuit elements, characterized in that said semiconductor body comprises a stratified structure with at least a first semiconductor layer having a first energy gap and a second semiconductor layer having a second energy gap higher than said first energy gap, said first and second semiconductor layers forming an interface between them and a two-dimensional charge carrier gas forming a current path near said interface, in which on application of a sufficiently high magnetic field component perpendicular to said interface and at a sufficiently low temperature said current path becomes superconducting so that at least the longitudinal resistance of said current path is reduced substantially to zero.
Claim 2
Dependent Claim
122 words
Integrated circuit comprising a semiconductor body with a plurality of circuit elements and interconnections between said circuit elements, characterized in that said semiconductor body comprises a stratified structure with at least a first semiconductor layer having a first energy gap and a second semiconductor layer having a second energy gap higher than said first energy gap, said first and second semiconductor layers forming an interface between them and a two-dimensional charge carrier gas forming a current path near said interface, in which on application of a sufficiently high magnetic field component perpendicular to said interface and at a sufficiently low temperature said current path becomes superconducting so that at least the longitudinal resistance of said current path is reduced substantially to zero.
Claim 3
Dependent Claim
63 words
Integrated circuit as claimed in claim 1, characterized in that said first semiconductor layer comprises at least a semiconductor material of the group or gallium arsenide and gallium indium arsenide, and in that said second semiconductor layer comprises at least a semiconductor material of the group of indium phosphide, gallium indium arsenide, aluminium gallium indium arsenide, aluminium indium arsenide and gallium indium phosphide.
Claim 4
Dependent Claim
20 words
Integrated circuit as claimed in claim 1, characterized in that said interconnections are laterally bounded by an implanted semiconductor region.
Claim 5
Dependent Claim
22 words
Integrated circuit as claimed in claim 1 or 2, characterized in that said interconnections are laterally bounded by a diffused semiconductor region.
Claim 6
Dependent Claim
21 words
Integrated circuit as claimed in claim 1 or 2, characterized in that said magnetic field component is lower than 7 Tesla.
Claim 7
Dependent Claim
31 words
Integrated circuit as claimed in claim 1 or 2, characterized in that the two-dimensional carrier gas is an electron gas with an electron density of about 3×10 11 per square cm.
Claim 8
Dependent Claim
99 words
Integrated circuit as claimed in claim 1 or 2, characterized in that the stratified structure comprises on a semi-insulating substrate an undoped layer of aluminium gallium arsenide of thickness ≦1 μm and ≧0.5 μm, an undoped layer of gallium arsenide of thickness ≦1 μm and ≧05, μm, an undoped layer of alumium gallium arsenide of thickness ≦10 nm and ≧2 nm, a 10 18 cm -3 silicon doped layer of aluminium gallium arsenide of thickness ≦50 nm and ≧5 nm and a 10 18 cm -3 silicon doped layer of gallium arsenide of thickness ≦50 nm and ≧5 nm.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1992-08-14 | 1993-02-13 | 1993-08-15 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1996-08-14 | 1997-02-13 | 1997-08-15 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2000-08-14 | 2001-02-13 | 2001-08-15 | $7700.00 | Window Closed / Lapsed |