Monolithically integrated insulated gate semiconductor device

Claim 1

A monolithically integrated semiconductor device comprising: a body of semiconductor material comprising: a first layer of one type conductivity, a second layer of opposite type conductivity forming a first PN junction with said first layer, a first region of one type conductivity disposed within said second layer and forming a second PN junction therewith, a second region of opposite type conductivity disposed within said first region and forming a third PN junction therewith, a third region of opposite type conductivity, disposed within said first region, forming a fourth PN junction therewith and spaced from said second region; an insulated gate electrode disposed over said first region and extending to the edge of each of said second and third regions; a first main electrode disposed in ohmic contact with said first layer; a second main electrode disposed in ohmic contact with said first and third regions; and when an appropriate main bias is applied across said first and second main electrodes and said insulated gate electrode is at a first bias voltage a conductive channel for carriers of said opposite conductivity type extending between said second and third regions is established for establishing a current flow through said device between said first and second main electrodes whereby an improvement in the conductivity modulation of the second layer is achieved by the injection of carriers from the second region into the second layer and said insulated gate electrode when at a second bias voltage fails to establish said conductive channel whereby said current flow is not established, or if present, is extinguished.