US4840924A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of fabricating a multichip package
Assignee: NEC Corp
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Filing: 1987-10-29
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Granted: 1989-06-20
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Expires: 2007-10-29
Abstract
Abstract A multichip package comprises a multilayer wiring substrate, and an array of contact pads having the ability to make wiring change formed on an uppermost layer of the substrate. The multichip package further comprises a plurality of IC chips mounted on the substrate. Each contact pad includes a connection conductor portion, and a separable conductive portion connecting a chip to an internal conductive layer provided in the substrate and integrally joined to the connection conductor portion. A connection is deleted by cutting the separable conductive portion thereafter to connect a wire to the connection conductor for making a wiring change, thus realizing the multichip package provided with an engineering change contact pad having excellent connecting and cutting functions. Further, IC chips are mounted on the substrate by making use of a solder dam of polyimide resin formed by applying a photosensitive polyimide precursor solution to the substrate, thus providing good contact between the chips and the substrate.
Inventors
- 👤 Kouji Kinbara
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 13:25
CPC Classifications
H; H05; H05K; H05K7/00; H05K7/02; H05K7/10; H05K7/1053; H05K7/1061; H05K1/00; H05K1/02; H05K1/0286; H05K1/0293; H10; H10P; H10P72/00; H10P72/04; H10P72/0444; H10W; H10W70/00; H10W70/60; H10W70/611; H10W70/62; H10W70/641; H10W70/67; H10W70/68; H10W70/685; H05K1/029; H05K1/0296; H05K1/0298; H05K2203/00; H05K2203/10; H05K2203/107; H05K2203/17; H05K2203/175; H05K3/00; H05K3/02; H05K3/027; H05K3/38; H05K3/388; H10W70/63; H10W90/00; H10W90/701; H10W90/721; H10W90/724; Y; Y10; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49117; Y10T29/49124; Y10T29/49155; Y10T29/49156
Claims Analysis
Total Claims: 3
Claim 1
Independent Claim
219 words
A method of fabricating a multichip package having an array of contact pads, each pad including a connection conductor portion and a separable conductive portion, particularly for fabricating said contact pad having the ability to make wiring changes, comprising the steps of: forming a multilayer thin film conductive layer comprising chromium, palladium and copper layers on an insulating layer; coating a photoresist on said multilayer thin film conductive layer; implementing exposure and development processes to said photoresist to form a first pattern including said separable conductive portion; implementing a multilayer plating process to form a first wiring layer constituted by nickel and gold plating layers and including said separable conductive portion, thereafter stripping off said photoresist; coating a photoresist on said multilayer thin film conductive layer and said first wiring layer for a second time; implementing exposure and development processes to said photoresist to form a second pattern including said connection conductor portion; implementing a plating process to form a second wiring layer including said connection conductor portion, thereafter stripping off said photoresist; removing the thin film conductive layer except for said first and second wiring layers, thereby completing a conductive portion for soldering; and thereafter forming a solder dam made of a photosensitive polyimide varnish on said insulating layer on which said conductive portion for soldering is formed.
Claim 2
Independent Claim
219 words
A method of fabricating a multichip package having an array of contact pads, each pad including a connection conductor portion and a separable conductive portion, particularly for fabricating said contact pad having the ability to make wiring changes, comprising the steps of: forming a multilayer thin film conductive layer comprising chromium, palladium and copper layers on an insulating layer; coating a photoresist on said multilayer thin film conductive layer; implementing exposure and development processes to said photoresist to form a first pattern including said separable conductive portion; implementing a multilayer plating process to form a first wiring layer constituted by nickel and gold plating layers and including said separable conductive portion, thereafter stripping off said photoresist; coating a photoresist on said multilayer thin film conductive layer and said first wiring layer for a second time; implementing exposure and development processes to said photoresist to form a second pattern including said connection conductor portion; implementing a plating process to form a second wiring layer including said connection conductor portion, thereafter stripping off said photoresist; removing the thin film conductive layer except for said first and second wiring layers, thereby completing a conductive portion for soldering; and thereafter forming a solder dam made of a photosensitive polyimide varnish on said insulating layer on which said conductive portion for soldering is formed.
Claim 3
Dependent Claim
58 words
A method of fabricating a multichip package as set forth in claim 1, wherein said step for forming said solder dam comprises the steps of spin-coating the photosensitive polyimide varnish on said insulating layer on which said conductive portion for soldering is formed, drying it in an oven, implementing an exposure and development process, and implementing thermal treatment.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1992-06-19 | 1992-12-19 | 1993-06-20 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1996-06-19 | 1996-12-19 | 1997-06-20 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2000-06-19 | 2000-12-19 | 2001-06-20 | $7700.00 | Window Closed / Lapsed |