US4839717A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Ceramic package for high frequency semiconductor devices
Assignee: National Semiconductor Corp
•
Filing: 1988-06-07
•
Granted: 1989-06-13
•
Expires: 2008-06-07
Abstract
Abstract A ceramic semiconductor package suitable for high frequency operation includes internal and external ground planes formed on opposite faces of a ceramic base member. The internal ground plane is connected to a ground ring formed on the packaged semiconductor device, and both ground planes are interconnected about the periphery of the package. In this way, a uniform and continuous ground is provided to minimize variations in signal transmission line impedance.
Inventors
- 👤 William S. Phy
- 👤 James M. Early
- 👤 Kevien J. Negus
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 04:46
CPC Classifications
H; H10; H10W; H10W70/00; H10W70/60; H10W70/62; H10W70/65; H10W70/657; H10W44/00; H10W44/20; H10W70/67; H10W70/68; H10W70/685; H10W76/00; H10W76/10; H10W76/12; H10W76/15; H10W76/157; H10W70/682; H10W72/00; H10W72/071; H10W72/075; H10W72/07551; H10W72/07554; H10W72/50; H10W72/531; H10W72/5363; H10W72/541; H10W72/5449; H10W72/547; H10W90/00; H10W90/701; H10W90/751; H10W90/754
Claims Analysis
Total Claims: 15
Claim 1
Independent Claim
157 words
A ceramic semiconductor package comprising: a ceramic base having parallel faces and a peripheral edge between said faces, wherein a first of said faces includes a site for attaching a semiconductor device; an internal ground plane formed on said first of said faces and extending substantially from the attachment site to the peripheral edge; an external ground plane formed on a second of said faces and covering substantially the entire area thereof; means for electrically connecting the internal ground plane and the external ground plane, said means including a plurality of conductors evenly spaced about the periphery of the base and extending between said first and second faces; a ceramic spacing layer over the internal ground plane on the first face of the ceramic base; a plurality of signal transmission lines formed over the ceramic spacing layer; a ceramic isolation layer formed over the ceramic spacing layer and filling spaces between adjacent conductors; and a cover layer.
Claim 2
Dependent Claim
157 words
A ceramic semiconductor package comprising: a ceramic base having parallel faces and a peripheral edge between said faces, wherein a first of said faces includes a site for attaching a semiconductor device; an internal ground plane formed on said first of said faces and extending substantially from the attachment site to the peripheral edge; an external ground plane formed on a second of said faces and covering substantially the entire area thereof; means for electrically connecting the internal ground plane and the external ground plane, said means including a plurality of conductors evenly spaced about the periphery of the base and extending between said first and second faces; a ceramic spacing layer over the internal ground plane on the first face of the ceramic base; a plurality of signal transmission lines formed over the ceramic spacing layer; a ceramic isolation layer formed over the ceramic spacing layer and filling spaces between adjacent conductors; and a cover layer.
Claim 3
Dependent Claim
20 words
A ceramic semiconductor package as in claim 1, wherein the attachment site is a cavity formed in the ceramic base.
Claim 4
Dependent Claim
21 words
A ceramic semiconductor package as in claim 2, wherein said spaced conductors are recessed in channels extending between the parallel faces.
Claim 5
Dependent Claim
158 words
An improved semiconductor package of the type including a ceramic base having a pair of parallel surfaces with a cavity formed in a first of those surfaces, a semiconductor device mounted in the cavity in the base and having peripheral bonding pads and a plurality of ceramic layers over the base enclosing the semiconductor device, and a plurality of conductors lying in a plane between adjacent ceramic layers and extending from proximate the semiconductor device to the periphery of the package, the improvement comprising: an internal ground plane formed about the cavity on said first surface of the base parallel to the conductor plane; an external ground plane formed on a second surface of the base parallel to the conductor plane; means for electrically connecting the internal and external ground planes to each other; and means at or near the periphery of the cavity for electrically connecting the internal ground plane to a ground on the semiconductor device.
Claim 6
Dependent Claim
158 words
An improved semiconductor package of the type including a ceramic base having a pair of parallel surfaces with a cavity formed in a first of those surfaces, a semiconductor device mounted in the cavity in the base and having peripheral bonding pads and a plurality of ceramic layers over the base enclosing the semiconductor device, and a plurality of conductors lying in a plane between adjacent ceramic layers and extending from proximate the semiconductor device to the periphery of the package, the improvement comprising: an internal ground plane formed about the cavity on said first surface of the base parallel to the conductor plane; an external ground plane formed on a second surface of the base parallel to the conductor plane; means for electrically connecting the internal and external ground planes to each other; and means at or near the periphery of the cavity for electrically connecting the internal ground plane to a ground on the semiconductor device.
Claim 7
Dependent Claim
35 words
An improved semiconductor package as in claim 4, wherein the semiconductor device includes a ground ring formed about the peripheral bonding pads, and wherein the ground ring is electrically connected to the internal ground plane.
Claim 8
Dependent Claim
41 words
An improved semiconductor package as in claim 5, wherein the ground ring on the semiconductor device is connected to the internal ground plane of the package by a plurality of ground bonding members spaced-apart about the periphery of the semiconductor device.
Claim 9
Dependent Claim
61 words
An improved semiconductor package as in claim 6, wherein the peripheral bonding pads on the semiconductor device are connected to the conductors between adjacent ceramic layers by a plurality of signal bonding members, and wherein said signal bonding members and the ground bonding members are alternated to improve uniformity in the ground connection and decrease coupling between adjacent signal bonding members.
Claim 10
Dependent Claim
18 words
An improved semiconductor package as in claim 7, wherein the signal and ground bonding members are wire bonds.
Claim 11
Dependent Claim
18 words
An improved semiconductor package as in claim 7, wherein the signal and ground bonding members are tape bonds.
Claim 12
Dependent Claim
40 words
An improved semiconductor package as in claim 4, wherein the means for electrically connecting the internal and external ground planes includes a plurality of conductors spaced-apart about the periphery of the base and extending between the first and second faces.
Claim 13
Dependent Claim
34 words
An improved semiconductor package as in claim 10, wherein the periphery of the ceramic base includes channels extending between said first and second faces and wherein said spaced-apart conductors are recessed in said channels.
Claim 14
Dependent Claim
20 words
An improved semiconductor package as in claim 11, wherein said conductors include terminal connectors at the periphery of the base.
Claim 15
Dependent Claim
18 words
An improved semiconductor package as in claim 12, wherein the terminal connectors are located between adjacent spaced-apart conductors.
References Cited (Backward Citations)
FR1305115A
Cited
US3683241A
Cited
FR2263606A1
Cited
JPS55166941A
Cited
US4288841A
Cited
JPS5768057A
Cited
JPS5756953A
Cited
US4561006A
Cited
US4608592A
Cited
WO1984001470A1
Cited
US4551746A
Cited
US4630172A
Cited
US4513355A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1992-06-12 | 1992-12-12 | 1993-06-13 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1996-06-12 | 1996-12-12 | 1997-06-13 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2000-06-12 | 2000-12-12 | 2001-06-13 | $7700.00 | Window Closed / Lapsed |