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US4839643A Expired / Lapsed US ⏱️ 0.0 years remaining

Broadband signal switching equipment

Assignee: Siemens AG
•
Filing: 1987-06-16
•
Granted: 1989-06-13
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Expires: 2007-06-16
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Abstract

Abstract Switches having a relatively high forward resistance are provided in a broadband signal switching equipment comprising a crosspoint matrix constructed in field effect transistor technology and provided with input drivers and output amplifiers. The output amplifiers respectively comprise an iterative network of a hysteresis-affected comparator and a D flip-flop, as well as a holding memory and a switch by way of which the holding memory is reloaded in a respective primary phase of a bit switching time interval. The reloading occurs at least approximately to the potential momentarily prevailing on the output line section leading away from the switch, this potential then continuing to be maintained at the second comparator input in the following switching phase.

Inventors

  • 👤 Wilhelm Koenig
  • 👤 Thomas Lang
  • 👤 Gerhard Trumpp

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-31 06:36
CPC Classifications
H; H04; H04Q; H04Q3/00; H04Q3/42; H04Q3/52; H04Q3/521

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 273 words
A broadband signal switching apparatus, comprising: a crosspoint matrix constructed in field effect trasistor technology devices and including a plurality of input lines and a plurality of output lines intersecting said input lines and forming crosspoints; a plurality of output amplifiers each connected to a respective output line; each said crosspoints comprising switch elements having a high forward resistance in the through connected condition compared to the internal resistance effective at the respective matrix input line; and wherein each of said output amplifiers comprises a circuit including a comparator having a first comparator input which is connected to the respective output line and having a second comparator input, a sample-and-hold circuit including a holding memory which is connected to said second input of said comparator, said sample-and-hold circuit further including a switch which connects said second input of said comparator and said holding memory to the respective output line and having a control electrode which receives clock pulses which are subdividing a bit switching time interval into a preliminary phase and an actual switching phase and by way of which said holding memory is reloaded through said switch of said sample-and-hold circuit during every preliminary phase at least approximately to the potential momentarily prevailing on the respective output line, and maintaining such potential at said second input of said comparator during the following switch phase, said comparator further having an output; and a memory element which receives an input from said comparator and also receives the clock pulses which are supplied to said switch of said sampler-and-hold circuit and said memory element having an output which is the output of the respective amplifier.
Claim 2
Dependent Claim 273 words
A broadband signal switching apparatus, comprising: a crosspoint matrix constructed in field effect trasistor technology devices and including a plurality of input lines and a plurality of output lines intersecting said input lines and forming crosspoints; a plurality of output amplifiers each connected to a respective output line; each said crosspoints comprising switch elements having a high forward resistance in the through connected condition compared to the internal resistance effective at the respective matrix input line; and wherein each of said output amplifiers comprises a circuit including a comparator having a first comparator input which is connected to the respective output line and having a second comparator input, a sample-and-hold circuit including a holding memory which is connected to said second input of said comparator, said sample-and-hold circuit further including a switch which connects said second input of said comparator and said holding memory to the respective output line and having a control electrode which receives clock pulses which are subdividing a bit switching time interval into a preliminary phase and an actual switching phase and by way of which said holding memory is reloaded through said switch of said sample-and-hold circuit during every preliminary phase at least approximately to the potential momentarily prevailing on the respective output line, and maintaining such potential at said second input of said comparator during the following switch phase, said comparator further having an output; and a memory element which receives an input from said comparator and also receives the clock pulses which are supplied to said switch of said sampler-and-hold circuit and said memory element having an output which is the output of the respective amplifier.
Claim 3
Dependent Claim 14 words
The broadband switching apparatus of claim 1, wherein: said comparator has a hysteresis effect.
Claim 4
Dependent Claim 15 words
The broadband switching aapparatus of claim 1, wherein said memory element comprises: a D flip-flop.

References Cited (Backward Citations)

US3718864A Cited
US3980831A Cited
US3983049A Cited
FR2365263A1 Cited
US4287441A Cited
US4588905A Cited
US4434381A Cited
US4571514A Cited
US4745409A Cited
US4746921A Cited
US4785299A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1992-06-12 1992-12-12 1993-06-13 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1996-06-12 1996-12-12 1997-06-13 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2000-06-12 2000-12-12 2001-06-13 $7700.00 Window Closed / Lapsed

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