US4839310A
Expired / Lapsed
US
⏱️ 0.0 years remaining
High mobility transistor with opposed-gates
Assignee: Massachusetts Institute of Technology
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Filing: 1988-01-27
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Granted: 1989-06-13
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Expires: 2008-01-27
Abstract
Abstract Horizontal and vertical transistors, such as, HEMT/SDHT devices are described with opposed gates for preventing substrate leakage current along with the methods for making same. Also a process for making single gate angled V-HEMT devices is described.
Inventors
- 👤 Mark A. Hollis
- 👤 William D. Goodhue
- 👤 Kirby B. Nichols
- 👤 Normand J. Bergeron, Jr.
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 19:49
CPC Classifications
C; C23; C23C; C23C14/00; C23C14/22; C23C14/225; H; H10; H10D; H10D30/00; H10D30/01; H10D30/015; H10D30/061; H10D30/40; H10D30/47; H10D30/471; H10D30/473; H10D30/4732; H10D30/4738; H10D30/475; H10D30/4755; H10D30/477; H10D30/478; H10D30/80; H10D30/87; H10D30/871; H10D62/00; H10D62/10; H10D62/113; H10D62/115; H10D62/116; H10D62/117; H10D62/17; H10D62/213; H10D62/221; H10D64/00; H10D64/01; H10D64/012; H10D64/0124; H10D64/0125; H10D64/0126; H10D64/20; H10D64/27; H10D64/311; H10D64/411; Y; Y10; Y10S; Y10S438/00; Y10S438/942; Y10S438/944
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
122 words
The method of forming vertical transistors with opposed gates comprising the steps of: (a) forming a first layer of high electron affinity material on a substrate; (b) removing laterally adjacent portions of said first layer to provide spaced columns having top walls and sidewalls of high electron affinity material projecting orthogonal to said substrate; (c) forming a second layer of high electron affinity material on said top walls and sidewalls; (d) forming a third layer of heavily doped n-type low electron affinity material over said second layer; (e) forming ohmic contacts on the portions of the third layer overlying the top walls and on the bottom of the substrate; (f) forming gate electrodes on portions of the third layer adjacent the sidewalls.
Claim 2
Independent Claim
122 words
The method of forming vertical transistors with opposed gates comprising the steps of: (a) forming a first layer of high electron affinity material on a substrate; (b) removing laterally adjacent portions of said first layer to provide spaced columns having top walls and sidewalls of high electron affinity material projecting orthogonal to said substrate; (c) forming a second layer of high electron affinity material on said top walls and sidewalls; (d) forming a third layer of heavily doped n-type low electron affinity material over said second layer; (e) forming ohmic contacts on the portions of the third layer overlying the top walls and on the bottom of the substrate; (f) forming gate electrodes on portions of the third layer adjacent the sidewalls.
Claim 3
Dependent Claim
22 words
The method of claim 1 wherein the gate electrodes are formed by angle evaporation using the ohmic contacts as a shadow mask.
Claim 4
Dependent Claim
27 words
The method of claim 2 wherein prior to formation of the gate electrodes, the third layer is recessed in the area where the gate electrode is formed.
Claim 5
Dependent Claim
24 words
The method of claim 1 wherein the portions of said first layer are removed in step (b) by a chlorine ion beam assisted etch.
Claim 6
Independent Claim
156 words
The method of forming vertical transistors with opposed gates comprising the steps of: (a) forming a first layer of high electron affinity material on a substrate; (b) removing laterally adjacent portions of said first layer to provide spaced columns having top walls and sidewalls of high electron affinity material projecting orthogonal to said substrate; (c) forming a second layer of high electron affinity material on said top walls and sidewalls; (d) forming a third layer of heavily doped n-type low electron affinity material over said second layer; (e) coating said third layer with a dissolvable insulative material; (f) removing portions of said insulative material leaving a base of said material extending between the sidewalls; (g) forming ohmic contacts on the portions of the third layer overlying the top walls and on the bottom of the substrate; (h) forming gate electrodes on portions of the third layer, said gate electrodes extending between the sidewalls over said base.
Claim 7
Independent Claim
156 words
The method of forming vertical transistors with opposed gates comprising the steps of: (a) forming a first layer of high electron affinity material on a substrate; (b) removing laterally adjacent portions of said first layer to provide spaced columns having top walls and sidewalls of high electron affinity material projecting orthogonal to said substrate; (c) forming a second layer of high electron affinity material on said top walls and sidewalls; (d) forming a third layer of heavily doped n-type low electron affinity material over said second layer; (e) coating said third layer with a dissolvable insulative material; (f) removing portions of said insulative material leaving a base of said material extending between the sidewalls; (g) forming ohmic contacts on the portions of the third layer overlying the top walls and on the bottom of the substrate; (h) forming gate electrodes on portions of the third layer, said gate electrodes extending between the sidewalls over said base.
Claim 8
Dependent Claim
14 words
The method of claim 5 wherein the gate electrodes are formed by angle evaporation.
Claim 9
Dependent Claim
18 words
The method of claim 5 wherein after formation of the gate electrodes, the insulative base material is dissolved.
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