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US4833342A
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Reference potential generating circuit
Assignee: Toshiba Corp
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Filing: 1988-05-10
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Granted: 1989-05-23
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Expires: 2008-05-10
Abstract
Abstract A reference potential generating circuit according to this invention includes a first insulated gate field effect transistor of an enhancement type, a second insulated gate field effect transistor of a depletion type and a voltage dividing circuit. The source of the first insulated gate field effect transistor is connected to the ground terminal, and the drain and gate thereof are connected to one another. The drain of the second insulated gate field effect transistor is connected to the power source and the gate thereof is connected to a connection node which connects the drain and gate of the first insulated gate field effect transistor. The voltage dividing circuit is connected between the drain of the first insulated gate field effect transistor and the source of the second insulated gate field effect transistor.
Inventors
- 👤 Masakazu Kiryu
- 👤 Hiroyuki Koinuma
- 👤 Kiminobu Suzuki
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 22:28
CPC Classifications
G; G11; G11C; G11C11/00; G11C11/21; G11C11/34; G11C11/40; G05; G05F; G05F3/00; G05F3/02; G05F3/08; G05F3/10; G05F3/16; G05F3/20; G05F3/24; G05F3/242; G05F3/247
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
119 words
A reference potential generating circuit comprising: a first potential supplying source; a second potential supplying source; a first insulated gate field effect transistor of an enhancement type having a source connected to said first potential supplying source, and a drain and a gate which are connected to one another; a second insulated gate field effect transistor of a depletion type having a drain connected to said second potential supplying source and a gate connected to a connection node positioned between the drain and gate of said first insulated gate field effect transistor; and voltage dividing means connected between the drain of said first insulated gate field effect transistor and the source of said second insulated gate field effect transistor.
Claim 2
Dependent Claim
119 words
A reference potential generating circuit comprising: a first potential supplying source; a second potential supplying source; a first insulated gate field effect transistor of an enhancement type having a source connected to said first potential supplying source, and a drain and a gate which are connected to one another; a second insulated gate field effect transistor of a depletion type having a drain connected to said second potential supplying source and a gate connected to a connection node positioned between the drain and gate of said first insulated gate field effect transistor; and voltage dividing means connected between the drain of said first insulated gate field effect transistor and the source of said second insulated gate field effect transistor.
Claim 3
Dependent Claim
29 words
A reference potential generating circuit according to claim 1, wherein said first potential supplying source is a ground terminal and said second potential supplying source is a power source.
Claim 4
Dependent Claim
89 words
A reference potential generating circuit according to claim 1, wherein said voltage dividing means includes a plurality of depletion type insulated gate field effect transistors which are serially connected between the drain of said first insulated gate field effect transistor and the source of said second insulated gate field effect transistor and each of which has a drain and a gate which are connected to one another, and an output voltage is derived from a connection node positioned between two of said depletion type insulated gate field effect transistors.
Claim 5
Dependent Claim
61 words
A reference potential generating circuit according to claim 1, wherein said voltage dividing means includes a plurality of resistors which are serially connected between the drain of said first insulated gate field effect transistor and the source of said second insulated gate field effect transistor, and an output voltage is derived from a connection node positioned between two of said resistors.
Claim 6
Dependent Claim
94 words
A reference potential generating circuit according to claim 1, wherein said voltage dividing means includes a plurality of depletion type insulated gate field effect transistors which are serially connected between the drain of said first insulated gate field effect transistor and the source of said second insulated gate field effect transistor and each of which has a gate connected to the ground terminal so as to be set in a conductive state, and an output voltage is derived from a connection node positioned between two of said depletion type insulated gate field effect transistors.
Claim 7
Dependent Claim
94 words
A reference potential generating circuit according to claim 1, wherein said voltage dividing means includes a plurality of depletion type insulated gate field effect transistors which are serially connected between the drain of said first insulated gate field effect transistor and the source of said second insulated gate field effect transistor and each of which has a gate connected to a power source so as to be set in a conductive state, and an output voltage is derived from a connection node positioned between two of said depletion type insulated gate field effect transistors.
Claim 8
Dependent Claim
90 words
A reference potential generating circuit according to claim 1, wherein said voltage dividing means includes a plurality of depletion type insulated gate field effect transistors which are serially connected between the drain of said first insulated gate field effect transistor and the source of said second insulated gate field effect transistor and each of which has a source and a gate which are connect to one another, and an outpiut voltage is derived from a connection node located between adjacent two of said depletion type insulated gate field effect transistors.
Claim 9
Dependent Claim
62 words
A reference potential generating circuit according to claim 1, wherein said voltage dividing means includes a plurality of diodes which are serially connected between the drain of said first insulated gate field effect transistor and the source of said second insulated gate field effect transistor, and an output voltage is derived from a connection node located between adjacent two of said diodes.
Claim 10
Dependent Claim
25 words
A reference potential generating circuit according to claim 1, said reference potential generating circuit being constituted to generate a reference voltage for a sense amplifier.
Claim 11
Dependent Claim
73 words
A reference potential generating circuit according to claim 1, further comprising an enhancement type insulated gate field effect transistor having a drain-source path connected between the gate of said second insulated gate field effect transistor and said first potential supplying source, and load means connected at one end to the drain and gate of said enhancement type insulated gate field effect transistor and at the other end to said second potential supplying source.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1992-05-22 | 1992-11-21 | 1993-05-23 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1996-05-22 | 1996-11-21 | 1997-05-23 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2000-05-22 | 2000-11-21 | 2001-05-23 | $7700.00 | Window Closed / Lapsed |