Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
194 words
An integrated circuit fabrication method for forming complementary field effect transistors on the same wafer substrate, comprising: epitaxially growing an intrinsic semiconductor buffer layer on a semiconductor substrate layer; epitaxially growing a semiconductor spacer layer on the buffer layer, said spacer layer being of different chemical composition and with a larger bandgap than said buffer layer; forming on said spacer layer an n-type doped semiconductor layer composed of the same material as said spacer layer; forming on said n-type doped layer a surface passivating n-type doped semiconductor cap layer composed of the same material as said buffer layer; implanting sufficient p-type ions into a selected portion of the n-type doped layer to transform said portion into a p-type layer; forming a pair of windows through the cap layer to expose portions of the n-type and p-type doped layers, respectively; forming a gap through the cap, semiconductor and the spacer layer and into the buffer layer to isolate the p-doped region from the n-doped region; and depositing respective source and drain contacts on the cap layer on opposite sides of each of said windows, and gate contacts on the underlying doped layers within said windows.
Claim 2
Dependent Claim
194 words
An integrated circuit fabrication method for forming complementary field effect transistors on the same wafer substrate, comprising: epitaxially growing an intrinsic semiconductor buffer layer on a semiconductor substrate layer; epitaxially growing a semiconductor spacer layer on the buffer layer, said spacer layer being of different chemical composition and with a larger bandgap than said buffer layer; forming on said spacer layer an n-type doped semiconductor layer composed of the same material as said spacer layer; forming on said n-type doped layer a surface passivating n-type doped semiconductor cap layer composed of the same material as said buffer layer; implanting sufficient p-type ions into a selected portion of the n-type doped layer to transform said portion into a p-type layer; forming a pair of windows through the cap layer to expose portions of the n-type and p-type doped layers, respectively; forming a gap through the cap, semiconductor and the spacer layer and into the buffer layer to isolate the p-doped region from the n-doped region; and depositing respective source and drain contacts on the cap layer on opposite sides of each of said windows, and gate contacts on the underlying doped layers within said windows.
Claim 3
Dependent Claim
11 words
The method of claim 1, wherein the p-type dopant comprises beryllium.
Claim 4
Dependent Claim
16 words
The method of claim 1, wherein said gap is no more than about ten microns wide.
Claim 5
Dependent Claim
30 words
The method of claim 3, further comprising the step of confining a two-dimensional electron gas (2DEG) at the non-implanted portions of the interface between the buffer and the spacer layer.
Claim 6
Dependent Claim
30 words
The method of claim 4, further comprising the step of confining a two-dimensional hole gas (2DHG) at the implanted portions of the interface between the buffer and the spacer layer.
Claim 7
Dependent Claim
31 words
The method of claim 5, wherein said 2DHG is formed by implanting sufficient p-type ions into a selected doped area of the 2DEG to transform said area into a 2DHG channel.