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US4662058A Expired / Lapsed US ⏱️ 0.0 years remaining

Self-aligned gate process for ICS based on modulation doped (Al,Ga) As/GaAs FETs

Assignee: Honeywell Inc
•
Filing: 1984-11-05
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Granted: 1987-05-05
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Expires: 2004-11-05
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Abstract

Abstract A self-aligned gate process for integrated circuits based on modulation doped (Al, Ga)As/GaAs field effect transistors and in which the regions on each side of the metal silicide gate are heavily ion implanted to form the low resistance regions on either side of the gate.

Inventors

  • 👤 Nicholas C. Cirillo, Jr.
  • 👤 Max J. Helix
  • 👤 Stephen A. Jamison

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-03 15:06
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/015; H10D30/40; H10D30/47; H10D30/471; H10D30/475; H10D30/4755; H10D30/60; H10D30/67; H10D30/6729; H10D30/6737; H10D30/6738; H10D30/674; H10D30/675; H10D62/00; H10D62/80; H10D62/85; H10D64/00; H10D64/60; H10D64/64

Claims Analysis

Total Claims: 19
Claim 1
Independent Claim 111 words
The method of fabricating an (Al,Ga)As/GaAs field effect transistor comprising: providing a semi-insulating single-crystalline GaAs substrate wafer; growing by molecular beam epitaxy on said substrate a plurality of successive single-crystalline layers, wherein one of said layers is an undoped GaAs layer, another of said layers is an undoped (Al,Ga)As layer, and still another of said layers is a n + doped (Al,Ga)As layer; depositing a gate electrode on the surface of the final eptaxial grown layer of said plurality of layers; ion-implanting with a silicon donor species the regions of the plurality of layers on either side of the gate electrode; and, activating the ion-implanted species with a rapid thermal anneal.
Claim 2
Independent Claim 111 words
The method of fabricating an (Al,Ga)As/GaAs field effect transistor comprising: providing a semi-insulating single-crystalline GaAs substrate wafer; growing by molecular beam epitaxy on said substrate a plurality of successive single-crystalline layers, wherein one of said layers is an undoped GaAs layer, another of said layers is an undoped (Al,Ga)As layer, and still another of said layers is a n + doped (Al,Ga)As layer; depositing a gate electrode on the surface of the final eptaxial grown layer of said plurality of layers; ion-implanting with a silicon donor species the regions of the plurality of layers on either side of the gate electrode; and, activating the ion-implanted species with a rapid thermal anneal.
Claim 3
Dependent Claim 23 words
The method according to claim 1 in which the surface of the substrate wafer is planar and the layers grown thereon are planar.
Claim 4
Dependent Claim 20 words
The method according to claim 1 in which the undoped GaAs layer is on the order of 1 μm thick.
Claim 5
Dependent Claim 20 words
The method according to claim 3 in which the undoped (Al,Ga)As layer is on the order of 60-100 Å thick.
Claim 6
Dependent Claim 22 words
The method according to claim 4 in which the n + doped (Al,Ga)As layer is on the order of 280 Å thick.
Claim 7
Dependent Claim 14 words
The method according to claim 1 in which the gate is titanium tungsten silicide.
Claim 8
Dependent Claim 43 words
The method according to claim 1 and further comprising the steps of depositing a metallic source electrode and drain electrode on the surface of said n + doped (Al,Ga)As layer, and forming alloy ohmic contacts in the heavily implanted regions by heat treatment.
Claim 9
Dependent Claim 17 words
The method according to claim 1 in which the GaAs substrate wafer has an orientation of <100>.
Claim 10
Dependent Claim 17 words
The method according to claim 1 in which the gate electrode is a MSi x (where x≧0).
Claim 11
Dependent Claim 15 words
The method according to claim 9 in which the gate electrode is a metal silicide.
Claim 12
Dependent Claim 14 words
The method according to claim 9 in which the gate electrode is a metal.
Claim 13
Dependent Claim 31 words
The method according to claim 9 in which the rapid thermal anneal is an anneal of 800°-850° C. for 1 to 5 seconds applied such as by a high intensity light.
Claim 14
Dependent Claim 16 words
The method according to claim 7 in which the metallic source and drain electrodes are AuGeNi.
Claim 15
Independent Claim 127 words
The method of fabricating an (Al,Ga)As/GaAs field effect transistor comprising: providing a semi-insulating single-crystalline GaAs substrate wafer; growing by molecular beam epitaxy a single-crystalline layer of undoped GaAs on a surface of said GaAs substrate wafer; growing by molecular beam epitaxy a single-crystalline layer of undoped (Al,Ga)As over said layer of undoped GaAs; growing by molecular beam epitaxy a single-crystalline layer of n + doped (Al,Ga)As over said layer of undoped (Al,Ga)As; depositing a MSi x (where x≧0) gate electrode on the surface of said n + doped (Al,Ga)As layer; ion-implanting with a silicon donor species into said grown layers of n + -(Al,Ga)As, undoped (Al,Ga)As, and undoped GaAs the regions on either side of the gate; and, activating the ion-implanted species with a rapid thermal anneal.
Claim 16
Independent Claim 127 words
The method of fabricating an (Al,Ga)As/GaAs field effect transistor comprising: providing a semi-insulating single-crystalline GaAs substrate wafer; growing by molecular beam epitaxy a single-crystalline layer of undoped GaAs on a surface of said GaAs substrate wafer; growing by molecular beam epitaxy a single-crystalline layer of undoped (Al,Ga)As over said layer of undoped GaAs; growing by molecular beam epitaxy a single-crystalline layer of n + doped (Al,Ga)As over said layer of undoped (Al,Ga)As; depositing a MSi x (where x≧0) gate electrode on the surface of said n + doped (Al,Ga)As layer; ion-implanting with a silicon donor species into said grown layers of n + -(Al,Ga)As, undoped (Al,Ga)As, and undoped GaAs the regions on either side of the gate; and, activating the ion-implanted species with a rapid thermal anneal.
Claim 17
Dependent Claim 43 words
The method according to claim 14 and further comprising the steps of depositing a metallic source electrode and drain electrode on the surface of said n + doped (Al,Ga)As layer, and forming alloy ohmic contacts in the heavily implanted regions by heat treatment.
Claim 18
Independent Claim 167 words
The method of fabricating an (Al,Ga)As/GaAs field effect transistor comprising: providing a <100>-oriented semi-insulating single-crystalline GaAs substrate wafer; growing by molecular-beam epitaxy (MBE) a single-crystalliine layer of undoped GaAs on a surface of said GaAs substrate wafer; growing by MBE a single-crystalline layer of undoped (Al,Ga)As over said layer of undoped GaAs; growing by MBE a single-crystalline layer of n + doped (Al,Ga)As over said layer of undoped (Al,Ga)As; depositing a metal silicide gate electrode on the surface of said n + doped (Al,Ga)As layer; ion-implanting with a silicon donor species into said grown layers of n + -(Al,Ga)As, undoped (Al,Ga)As, and undoped GaAs the regions on either side of the metal silicide gate; activating the ion-implanted species with a rapid anneal of 800°-850° C. for 1-5 seconds applied such as by a high intensity light; depositing a metallic source electrode and drain electrode on the surface of said n + doped (Al,Ga)As layer; and, forming alloy ohmic contacts in the heavily implanted regions by heat treatment.
Claim 19
Independent Claim 167 words
The method of fabricating an (Al,Ga)As/GaAs field effect transistor comprising: providing a <100>-oriented semi-insulating single-crystalline GaAs substrate wafer; growing by molecular-beam epitaxy (MBE) a single-crystalliine layer of undoped GaAs on a surface of said GaAs substrate wafer; growing by MBE a single-crystalline layer of undoped (Al,Ga)As over said layer of undoped GaAs; growing by MBE a single-crystalline layer of n + doped (Al,Ga)As over said layer of undoped (Al,Ga)As; depositing a metal silicide gate electrode on the surface of said n + doped (Al,Ga)As layer; ion-implanting with a silicon donor species into said grown layers of n + -(Al,Ga)As, undoped (Al,Ga)As, and undoped GaAs the regions on either side of the metal silicide gate; activating the ion-implanted species with a rapid anneal of 800°-850° C. for 1-5 seconds applied such as by a high intensity light; depositing a metallic source electrode and drain electrode on the surface of said n + doped (Al,Ga)As layer; and, forming alloy ohmic contacts in the heavily implanted regions by heat treatment.

References Cited (Backward Citations)

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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1990-05-04 1990-11-03 1991-05-05 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1994-05-04 1994-11-03 1995-05-05 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1998-05-04 1998-11-03 1999-05-05 $7700.00 Window Closed / Lapsed

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