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US4827489A Expired / Lapsed US ⏱️ 0.0 years remaining

Decoding device for digital signals

Assignee: Hitachi Ltd
•
Filing: 1987-05-01
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Granted: 1989-05-02
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Expires: 2007-05-01
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Abstract

Abstract A device for decoding coded digital signals for every symbol consisting of a plurality of binary signals comprises first circuit for generating a first reliability for every binary signal; hard decided from the received or reproduced signal, in the symbol and second circuit for generating a second reliability for every symbol consisting of n binary signals on the basis of the first reliability, whereby decoding processing e.g. soft decision decoding is effected for every signal, depending on the second reliability.

Inventors

  • 👤 Nobukazu Doi
  • 👤 Hideki Imai
  • 👤 Morishi Izumita
  • 👤 Seiichi Mita
  • 👤 Akira Saito
  • 👤 Hiroto Yamauchi
  • 👤 Mamoru Kaneko
  • 👤 Tetsuya Amano

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-05 03:04
CPC Classifications
H; H04; H04L; H04L1/00; H03; H03M; H03M13/00; H03M13/37; H03M13/45

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 81 words
A device for decoding coded digital signals for every symbol consisting of a plurality of binary signals comprising: first means for generating a respective first reliability for every binary signal; hard decided from the received or reproduced signal, in said symbol; second means for generating a second reliability for each symbol on the basis of said first reliabilities of all bits composing the symbols; and means for performing soft decision decoding for every symbol on the basis of said second reliability.
Claim 2
Independent Claim 81 words
A device for decoding coded digital signals for every symbol consisting of a plurality of binary signals comprising: first means for generating a respective first reliability for every binary signal; hard decided from the received or reproduced signal, in said symbol; second means for generating a second reliability for each symbol on the basis of said first reliabilities of all bits composing the symbols; and means for performing soft decision decoding for every symbol on the basis of said second reliability.
Claim 3
Dependent Claim 67 words
A device for decoding coded digital signals according to claim 1, wherein said first means consists of means for quantizing each of received or reproduced signal into bits not less than 2, means for adopting the most significant bit as binary signal the result of a hard decision; and means for adopting the bits other than the most significant bit as the reliabilities of the binary signal.
Claim 4
Dependent Claim 52 words
A device for decoding coded digital signals according to claim 1, wherein said second means obtains said second reliability L i by using; L.sub.i ≃-log{exp(-r.sub.il)+exp(-r.sub.i2) + . . . +exp(-r.sub.in)}, where r ij (1≦j≦n) is a likelihood ratio of the j-th binary signal of the i-th symbol consisting of n binary signals.
Claim 5
Dependent Claim 54 words
A device for decoding coded digital signals according to claim 1, wherein said second means obtains said second reliability L i by using; L.sub.i ≃min(r.sub.1, r.sub.2, . . . , r.sub.n) where r ij (1≦j ≦n) is a likelihood ratio of the j-th binary signal of the i-th symbol consisting of n binary signal.
Claim 6
Dependent Claim 27 words
A device for decoding coded digital signals according to claim 1, wherein said second reliability is the lowest one among the first reliabilities of the binary signals.
Claim 7
Dependent Claim 26 words
A device for decoding coded digital signals according to claim 1, wherein said second reliability is the product of the first reliabilities of the binary signals.
Claim 8
Dependent Claim 26 words
A device for decoding coded digital signals according to claim 1, wherein said second reliability is the sum of the first reliabilities of the binary signals.

References Cited (Backward Citations)

US3908169A Cited
JPS5890853A Cited
US4535294A Cited
JPS602812A Cited
US4700357A Cited
US4700365A Cited
JPH05140782A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1992-05-01 1992-10-31 1993-05-02 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1996-05-01 1996-10-31 1997-05-02 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2000-05-01 2000-10-31 2001-05-02 $7700.00 Window Closed / Lapsed

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