US4827326A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Integrated circuit having polyimide/metal passivation layer and method of manufacture using metal lift-off
Assignee: Motorola Solutions Inc
•
Filing: 1987-11-02
•
Granted: 1989-05-02
•
Expires: 2007-11-02
Abstract
Abstract This process uses a metal lift-off step and results in a layer of polyimide covering the surface of an integrated circuit, except at the bonding pads which are covered by metals. A layer of polyimide is applied to the surface of an integrated circuit and then partially cured. A layer of positive photo-resist is applied over the polyimide layer and then pattern exposed and developed, resulting in windows being opened up over the bonding pads of the integrated circuit. The remaining photo-resist is then flood exposed. One or more metals are then sputtered over the resist and the bonding pads. The integrated circuit is then immersed in solvent and the remaining layer of photo-resist, including the metal above it, is lifted-off. Only the metal over the bonding pads remains. The polyimide layer is then fully cured.
Inventors
- 👤 Leonard F. Altman
- 👤 Kevin D. Moore
- 👤 John D. Shurboff
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 06:34
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/01; H10W20/031; H10W20/056; H10W20/058; H10W74/00; H10W74/01; H10W72/00; H10W72/01; H10W72/019; H10W72/01951; H10W72/01955; H10W72/20; H10W72/29; H10W72/50; H10W72/59; H10W72/701; H10W72/709; H10W72/90; H10W72/921; H10W72/923; H10W72/931; H10W72/934; H10W72/951; H10W72/952; Y; Y10; Y10S; Y10S438/00; Y10S438/942; Y10S438/948; Y10S438/951
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
90 words
A process for passivating an integrated circuit, comprising the steps of: applying a layer of polyimide to the surface of an integrated circuit; applying a layer of photo-resist over said layer of polyimide; removing areas of said layer of photoresist and areas of said layer of polyimide that overlie the bonding pads of said integrated circuit; depositing a metal layer over said layer of photo-resist and over the exposed bonding pads; and lifting-off said layer of photo-resist including the areas of said metal layer that overlie said layer of photo-resist.
Claim 2
Dependent Claim
90 words
A process for passivating an integrated circuit, comprising the steps of: applying a layer of polyimide to the surface of an integrated circuit; applying a layer of photo-resist over said layer of polyimide; removing areas of said layer of photoresist and areas of said layer of polyimide that overlie the bonding pads of said integrated circuit; depositing a metal layer over said layer of photo-resist and over the exposed bonding pads; and lifting-off said layer of photo-resist including the areas of said metal layer that overlie said layer of photo-resist.
Claim 3
Dependent Claim
10 words
An integrated circuit manufactured by the process of claim 2.
Claim 4
Dependent Claim
110 words
A process for passivating an integrated circuit, comprising the steps of: applying a layer of polyimide to the surface of an integrated circuit; partially curing said layer of polyimide; applying a layer of photo-resist over said layer of polyimide; removing areas of said layer of photo-resist and areas of said layer of polyimide film that overlie the bonding pads of said integrated circuit; flood exposing said layer of photo-resist; depositing a layer of metal over said layer of polyimide and over said bonding pads; lifting-off said layer of photo-resist including the areas of said layer of metal that overlie said layer of photo-resist; and further curing said layer of polyimide.
Claim 5
Dependent Claim
110 words
A process for passivating an integrated circuit, comprising the steps of: applying a layer of polyimide to the surface of an integrated circuit; partially curing said layer of polyimide; applying a layer of photo-resist over said layer of polyimide; removing areas of said layer of photo-resist and areas of said layer of polyimide film that overlie the bonding pads of said integrated circuit; flood exposing said layer of photo-resist; depositing a layer of metal over said layer of polyimide and over said bonding pads; lifting-off said layer of photo-resist including the areas of said layer of metal that overlie said layer of photo-resist; and further curing said layer of polyimide.
Claim 6
Dependent Claim
10 words
An integrated circuit manufactured by the process of claim 3.
Claim 7
Dependent Claim
152 words
A process for passivating an integrated circuit, comprising the steps of: applying a layer of polyimide to the surface of an integrated circuit; partially curing said layer of polyimide; applying a layer of positive photo-resist over said layer of polyimide; pattern exposing said layer of photo-resist such that areas of said photo-resist that overlie the bonding pads of said integrated circuit are exposed to light; emersing said integrated circuit in a developer such that the exposed areas of said photo-resist and the areas of said polyimide layer that underlie said exposed areas of said photo-resist are removed; flood exposing said layer of photo-resist; depositing a layer of metal over said layer of polyimide and over said bonding pads; emersing said integrated circuit in a solvent to lift-off said layer of photo-resist including the areas of said layer of metal that overlie said layer of photo-resist; and further curing said layer of polyimide.
Claim 8
Dependent Claim
152 words
A process for passivating an integrated circuit, comprising the steps of: applying a layer of polyimide to the surface of an integrated circuit; partially curing said layer of polyimide; applying a layer of positive photo-resist over said layer of polyimide; pattern exposing said layer of photo-resist such that areas of said photo-resist that overlie the bonding pads of said integrated circuit are exposed to light; emersing said integrated circuit in a developer such that the exposed areas of said photo-resist and the areas of said polyimide layer that underlie said exposed areas of said photo-resist are removed; flood exposing said layer of photo-resist; depositing a layer of metal over said layer of polyimide and over said bonding pads; emersing said integrated circuit in a solvent to lift-off said layer of photo-resist including the areas of said layer of metal that overlie said layer of photo-resist; and further curing said layer of polyimide.
Claim 9
Dependent Claim
10 words
An integrated circuit manufactured by the process of claim 5.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1992-05-01 | 1992-10-31 | 1993-05-02 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1996-05-01 | 1996-10-31 | 1997-05-02 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2000-05-01 | 2000-10-31 | 2001-05-02 | $7700.00 | Window Closed / Lapsed |