Device interface controller for intercepting communication between a microcomputer and peripheral devices to control data transfers

Claim 1

Apparatus for use as an interface between a host microcomputer having input/output means and at least one peripheral device which is operated to receive data from and transmit data to said input/output means of said host microcomputer, said peripheral device being provided with a DMA controller having a control bus, an address bus, and a data bus and means for controlling the operation of said peripheral device; said apparatus comprising: a bus interface having interface means which are separately interconnected to the control bus, the address bus and the data bus of the DMA controller; a device interface controller coupled to said interface means of said bus interface, said device interface controller having means for monitoring data received via said bus interface and means for storing a general instruction program for controlling said DMA controller, said device interface controller being operative to examine the data received from said DMA controller via said bus interface and to control said DMA controller by means of said general instruction program based upon the examination of the data received therefrom; data storage means directly coupled between said host microcomputer and said device interface controller for temporarily storing data transmitted between said host microcomputer and said peripheral device; an interrupt signaling line coupled between said host microcomputer and said device interface controller for providing an interrupt signal to said host microcomputer to transmit and receive data to and from said data storage means, respectively; wherein said host microcomputer communicates with said device interface controller only via interrupt signals provided on said interrupt signaling line for the transmitting and receiving of data to and from said peripheral device, whereby said microcomputer is less frequently required to respond to teh operation of said DMA controller of said peripheral device due to the interposed control of said DMA controller by said device interface controller.