Patent US4818728A successfully refreshed from Google Patents.
US4818728A
Expired / Lapsed
US
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Method of making a hybrid semiconductor device
Assignee: Sharp Corp
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Filing: 1987-12-03
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Granted: 1989-04-04
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Expires: 2007-12-03
Abstract
Abstract A method for making a semiconductor device of a type comprising at least first and second semiconductor circuit units, which method comprises the step of forming a plurality of connecting electrodes on an upper surface of each of at least first and second semiconductor substrates; forming an electrically insulating layer entirely over the upper surface of each of the first and second substrates so as to cover the respective connecting electrodes; partially removing the insulating layer on each of the first and second substrates to permit the respective electrodes to be exposed to the outside; forming metal studs on the first substrate in contact with the electrodes so as to protrude outwardly of the respective insulating layer to complete the first semiconductor unit and forming solder deposits on the second substrate in contact with the respective electrodes on such second substrate to complete the second semiconductor unit; combining the first and second semiconductor units with the metal studs in the first semiconductor unit aligned respectively with the solder deposits in the second semiconductor unit; and heating the resultant assembly to allow the solder deposits to be melted with the associated metal studs consequently immersed into the melted solder deposits thereby to accomplish a firm interlock between the electrodes on the first and second substrates.
Inventors
- 👤 Akiteru Rai
- 👤 Keiji Yamamura
- 👤 Takashi Nukii
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 04:41
CPC Classifications
H; H10; H10W; H10W72/00; H10W72/20; H10W90/00; H10W46/00; H10W72/241; H10W72/242; H10W72/251; H10W74/00; H10W74/10; H10W74/15; H10W90/701; H10W90/721; H10W90/722; H10W90/724; Y; Y10; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49117; Y10T29/49124; Y10T29/49126; Y10T29/53; Y10T29/5313; Y10T29/53174
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
213 words
A method for making a semiconductor device of a type comprising at least first and second semiconductor circuit units, which method comprises the step of; forming a plurality of connecting electrodes on an upper surface of each of at least first and second semiconductor substrates; forming an lectrically insulating layer entirely over the upper surface of each of the first and second substrates so as to cover the respective connecting electrodes; partially removing the insulating layer on each of the first and second substrates to permit the respective electrodes to be exposed to the outside; forming metal studs on the first substrate in contact with the electrodes so as to protrude outwardly of the respective insulating layer to complete the first semiconductor unit and forming solder deposits on the second substrate in contact with the respective electrodes on such second substrate to complete the second semiconductor unit; juxtaposing the first and second semiconductor with the metal studs in the first semiconductor unit aligned respectively with the solder deposits in the second semiconductor unit; and heating the resultant assembly to allow the solder deposits to be melted with the associated metal studs consequently immersed into the melted solder deposits thereby to accomplish a firm interlock between the electrodes on the first and second substrates.
Claim 2
Independent Claim
213 words
A method for making a semiconductor device of a type comprising at least first and second semiconductor circuit units, which method comprises the step of; forming a plurality of connecting electrodes on an upper surface of each of at least first and second semiconductor substrates; forming an lectrically insulating layer entirely over the upper surface of each of the first and second substrates so as to cover the respective connecting electrodes; partially removing the insulating layer on each of the first and second substrates to permit the respective electrodes to be exposed to the outside; forming metal studs on the first substrate in contact with the electrodes so as to protrude outwardly of the respective insulating layer to complete the first semiconductor unit and forming solder deposits on the second substrate in contact with the respective electrodes on such second substrate to complete the second semiconductor unit; juxtaposing the first and second semiconductor with the metal studs in the first semiconductor unit aligned respectively with the solder deposits in the second semiconductor unit; and heating the resultant assembly to allow the solder deposits to be melted with the associated metal studs consequently immersed into the melted solder deposits thereby to accomplish a firm interlock between the electrodes on the first and second substrates.
Claim 3
Independent Claim
158 words
A method for making a semiconductor device having at least first and second semiconductor circuit units, the steps comprising: forming a plurality of connecting electrodes on an upper surface of each of said first and second semiconductor circuit units; providing electrically insulating layers over the upper surface of both said first and second semiconductor units separating said plurality of connecting electrodes; partially removing said insulating layer exposing said plurality of connecting electrodes; forming a plurality corresponding studs on said plurality of connecting electrodes of said first semiconductor unit whereby said studs protrude beyond the upper surface of said insulating layer; depositing solder material in contact with the plurality of connecting electrodes of said second semiconductor unit; juxtaposing said first semiconductor unit against said second semiconductor circuit units by emerging said studs of said first semiconductor unit into corresponding deposits of said solder material; and heating said combined first and second semiconductor circuit units to form the semiconductor device.
Claim 4
Independent Claim
158 words
A method for making a semiconductor device having at least first and second semiconductor circuit units, the steps comprising: forming a plurality of connecting electrodes on an upper surface of each of said first and second semiconductor circuit units; providing electrically insulating layers over the upper surface of both said first and second semiconductor units separating said plurality of connecting electrodes; partially removing said insulating layer exposing said plurality of connecting electrodes; forming a plurality corresponding studs on said plurality of connecting electrodes of said first semiconductor unit whereby said studs protrude beyond the upper surface of said insulating layer; depositing solder material in contact with the plurality of connecting electrodes of said second semiconductor unit; juxtaposing said first semiconductor unit against said second semiconductor circuit units by emerging said studs of said first semiconductor unit into corresponding deposits of said solder material; and heating said combined first and second semiconductor circuit units to form the semiconductor device.
Claim 5
Dependent Claim
20 words
A method for making a semiconductor device as contained in claim 2, wherein the plurality of studs are cylindrically shaped.
Claim 6
Dependent Claim
30 words
A method for making a semiconductor device as contained in claim 2, further comprising: inserting a bonding agent between the insulating layers of said first and second semiconductor circuit units.
Claim 7
Dependent Claim
28 words
A method of making a semiconductor device as contained in claim 2, further comprising: forming perforated holes in said second semiconductor unit when partially removing said insulating layer.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 1992-04-03 | 1992-10-03 | 1993-04-04 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1996-04-03 | 1996-10-03 | 1997-04-04 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2000-04-03 | 2000-10-03 | 2001-04-04 | $7700.00 | Window Closed / Lapsed |