Process for bonding die to substrate using a gold/silicon seed

Claim 1

A method for attaching a semiconductor die having a planar size of at least 0.200×0.200 inches onto a dielectrically insulated body, said die having a silicon chip and an intermediate metal, comprising the steps of: (a) placing a pure gold preform on said dielectrically insulated body; (b) placing a gold/silicon seed comprised of a gold/silicon eutectic alloy having a lower percentage of silicon than gold, on said deposited gold preform, wherein said gold/silicon seed contacts approximately 10-20% of a surface of said pure gold preform; (c) placing said die on said gold/silicon seed such that said intermediate metal contacts said gold/silicon seed; (d) heating said gold preform and gold/silicon seed; and, (e) scrubbing gently said die on said gold/silicon seed at a bonding temperature of approximately 400° C., such that said gold/silicon seed melts and forms a liquid layer which provides a medium for further transfer of thermal energy to said chip; continued scrubbing of said die causes silicon atoms from said chip to penetrate said intermediate metal and combine with said gold/silicoin liquid, wherein said percentage of silicon increases causing eutectic melting point of said gold/silicon layer to decrease. said scrubbing is initiated at a eutectic melting point of gold/silicon having an initial value greater than the minimum melting temperature of gold/silicon, but continued scrubbing causes said eutectic melting point to decrease in value until said minimum value is reached at which time further reaction of silicon from said chip increases percentage of silicon in comparison to gold, causing said eutectic melting point to increase until said eutectic melting point reaches said bonding temperature; whereby said gold/silicon melts and forms an eutectic bond of said die to said gold preform.

Claim 2

A method for attaching a semiconductor die having a planar size of at least 0.200×0.200 inches onto a dielectrically insulated body, said die having a silicon chip and an intermediate metal, comprising the steps of: (a) placing a pure gold preform on said dielectrically insulated body; (b) placing a gold/silicon seed comprised of a gold/silicon eutectic alloy having a lower percentage of silicon than gold, on said deposited gold preform, wherein said gold/silicon seed contacts approximately 10-20% of a surface of said pure gold preform; (c) placing said die on said gold/silicon seed such that said intermediate metal contacts said gold/silicon seed; (d) heating said gold preform and gold/silicon seed; and, (e) scrubbing gently said die on said gold/silicon seed at a bonding temperature of approximately 400° C., such that said gold/silicon seed melts and forms a liquid layer which provides a medium for further transfer of thermal energy to said chip; continued scrubbing of said die causes silicon atoms from said chip to penetrate said intermediate metal and combine with said gold/silicoin liquid, wherein said percentage of silicon increases causing eutectic melting point of said gold/silicon layer to decrease. said scrubbing is initiated at a eutectic melting point of gold/silicon having an initial value greater than the minimum melting temperature of gold/silicon, but continued scrubbing causes said eutectic melting point to decrease in value until said minimum value is reached at which time further reaction of silicon from said chip increases percentage of silicon in comparison to gold, causing said eutectic melting point to increase until said eutectic melting point reaches said bonding temperature; whereby said gold/silicon melts and forms an eutectic bond of said die to said gold preform.