Patent US4808273A successfully refreshed from Google Patents.
US4808273A
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Method of forming completely metallized via holes in semiconductors
Assignee: Avago Technologies International Sales Pte Ltd
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Filing: 1988-05-10
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Granted: 1989-02-28
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Expires: 2008-05-10
Abstract
Abstract A method is disclosed for forming completely metallized via holes in semiconductor wafers. Metal pads are formed on one face of a semiconductor wafer together with a conductive interconnecting network. An insulating layer is then deposited to cover this face of the wafer. Holes are etched in the opposite face of the wafer up to and exposing a portion of the metal pads. The via holes are then completely filled with metal by means of electroplating, using the metal pads as a cathode.
Inventors
- 👤 Chang-Hwang Hua
- 👤 Ding-Yuan S. Day
- 👤 Simon S. Chan
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 18:23
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/01; H10W20/021; H10W20/023; H10W20/0234; H10W20/0242
Claims Analysis
Total Claims: 20
Claim 1
Independent Claim
76 words
A method for forming metallized via holes in a semiconductor wafer having first and second sides comprising the steps of: (a) forming electrically interconnected conductive pads on said first side of said wafer; (b) forming holes through said wafer from said second side to said first side, in alignment with said conductive pads, to thereby expose the underside of said pads; (c) electroplating the interior surfaces of said holes, using said interconnected pads as a cathode.
Claim 2
Independent Claim
76 words
A method for forming metallized via holes in a semiconductor wafer having first and second sides comprising the steps of: (a) forming electrically interconnected conductive pads on said first side of said wafer; (b) forming holes through said wafer from said second side to said first side, in alignment with said conductive pads, to thereby expose the underside of said pads; (c) electroplating the interior surfaces of said holes, using said interconnected pads as a cathode.
Claim 3
Dependent Claim
31 words
The method according to claim 1 further comprising the step of forming an insulating layer over said first side of said wafer and said interconnected pads prior to said electroplating step.
Claim 4
Dependent Claim
34 words
The method according to claim 2 wherein said step of forming an insulating layer comprises covering over with wax said first side of said wafer and said interconnected pads prior to said electroplating step.
Claim 5
Dependent Claim
19 words
The method according to claim 2 wherein said step of forming said hole comprises reactive ion etching said hole.
Claim 6
Independent Claim
122 words
A method for forming one or more metallized via holes in a semiconductor wafer having a first side and a second side comprising the steps of: (a) forming at least one conductive pad on said first side, said pad having a top surface and a bottom surface, said bottom surface facing the first side of the wafer; (b) forming an insulating layer over said first side of said wafer and said pad; (c) forming at least one hole through said wafer from said second side to said first side, said hole exposing at least a portion of the bottom surface of said pad; (d) electroplating to fill the entire volume of said hole with conductive material using said pad as the cathode.
Claim 7
Independent Claim
122 words
A method for forming one or more metallized via holes in a semiconductor wafer having a first side and a second side comprising the steps of: (a) forming at least one conductive pad on said first side, said pad having a top surface and a bottom surface, said bottom surface facing the first side of the wafer; (b) forming an insulating layer over said first side of said wafer and said pad; (c) forming at least one hole through said wafer from said second side to said first side, said hole exposing at least a portion of the bottom surface of said pad; (d) electroplating to fill the entire volume of said hole with conductive material using said pad as the cathode.
Claim 8
Dependent Claim
39 words
The method according to claim 5 further comprising the step of selectively removing a portion of said insulating layer, prior to said electroplating step, to expose a region of said pad for making electrical contact during the electroplating step.
Claim 9
Dependent Claim
38 words
The method according to claim 5 wherein the electroplating step further comprises making electrical contact to said pad by contacting said pad with a probe through said hole to thereby use said pad as the cathode for electroplating.
Claim 10
Dependent Claim
33 words
The method according to claim 5 wherein said step of forming an insulating layer comprises covering over with wax said first side of said wafer and said pad prior to said electroplating step.
Claim 11
Dependent Claim
19 words
The method according to claim 5 wherein said step of forming said holes comprises reactive ion etching said holes.
Claim 12
Independent Claim
98 words
A method for forming completely metallized via holes in a semiconductor wafer having a first side and a second side comprising the steps of: (a) selectively depositing interconnected, conductive pads on said first side; (b) forming an insulating layer over said first side of said wafer and over said pads and said interconnections; (c) forming holes through said wafer to said pads, said holes exposing at least a portion of the surfaces of said pads which face the wafer; (d) filling said holes with conductive material by electroplating while using said pads and said interconnections as a cathode.
Claim 13
Independent Claim
98 words
A method for forming completely metallized via holes in a semiconductor wafer having a first side and a second side comprising the steps of: (a) selectively depositing interconnected, conductive pads on said first side; (b) forming an insulating layer over said first side of said wafer and over said pads and said interconnections; (c) forming holes through said wafer to said pads, said holes exposing at least a portion of the surfaces of said pads which face the wafer; (d) filling said holes with conductive material by electroplating while using said pads and said interconnections as a cathode.
Claim 14
Dependent Claim
42 words
The method according to claim 10 wherein the electroplating step further comprises selectively removing a region of said insulating layer and then making electrical contact to said interconnected pads to allow the interconnected pads to be used as the cathode for electroplating.
Claim 15
Dependent Claim
38 words
The method according to claim 10 wherein the electroplating step further comprises making electrical, cathode contact to said interconnected pads by contacting at least one of said pads with a probe through an appropriate one of said holes.
Claim 16
Dependent Claim
34 words
The method according to claim 10 wherein said step of forming an insulating layer comprises covering over with wax said first side of said wafer and said interconnected pads prior to said electroplating step.
Claim 17
Dependent Claim
19 words
The method according to claim 10 wherein said step of forming said holes comprises reactive ion etching said holes.
Claim 18
Dependent Claim
16 words
The method according to claim 1 wherein said electroplating step comprises filling said holes with gold.
Claim 19
Dependent Claim
16 words
The method according to claim 5 wherein said electroplating step comprises filling said holes with gold.
Claim 20
Dependent Claim
16 words
The method according to claim 10 wherein said electroplating step comprises filling said holes with gold
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1992-02-28 | 1992-08-29 | 1993-02-28 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1996-02-28 | 1996-08-29 | 1997-02-28 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2000-02-28 | 2000-08-29 | 2001-02-28 | $7700.00 | Window Closed / Lapsed |