Patent US234010A successfully refreshed from Google Patents.
Patent US2140443A successfully refreshed from Google Patents.
Patent US4801892A successfully refreshed from Google Patents.
US4801892A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Current mirror circuit
Assignee: Nippon Precision Circuits Inc
•
Filing: 1987-09-09
•
Granted: 1989-01-31
•
Expires: 2007-09-09
Abstract
Abstract A current mirror circuit of the present invention has the structure that the diode-connected second transistor is connected in series to the first transistor, the third and fourth transistors have bases which are respectively connected to the bases of the first and second transistors which are connected in series, and the collector of the fifth transitors, whose emitter and base are connected between the base and collector of the first transistor, is connected to the collector of the fourth transistor.
Inventors
- 👤 Akira Yamakoshi
- 👤 Toyohiko Fujita
- 👤 Kunihiko Tsukakoshi
- 👤 Shinji Anraku
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 18:41
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/04; G; G05; G05F; G05F3/00; G05F3/02; G05F3/08; G05F3/10; G05F3/16; G05F3/20; G05F3/26; G05F3/265
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
114 words
A current mirror circuit comprising a first transistor, a second diode-connected transistor connected in series to said first transistor and having a collector receptive of an input current, a third transistor having a base which is connected to a base of said first transistor, a fourth transistor connected in series to the third transistor with a base connected to a base of said second transistor and a collector from which an output current is obtained, and a fifth transistor having an emitter which is connected to the base of said first transistor a base connected to a collector of said first transistor and a collector directly connected to the collector of said fourth transistor.
Claim 2
Dependent Claim
114 words
A current mirror circuit comprising a first transistor, a second diode-connected transistor connected in series to said first transistor and having a collector receptive of an input current, a third transistor having a base which is connected to a base of said first transistor, a fourth transistor connected in series to the third transistor with a base connected to a base of said second transistor and a collector from which an output current is obtained, and a fifth transistor having an emitter which is connected to the base of said first transistor a base connected to a collector of said first transistor and a collector directly connected to the collector of said fourth transistor.
Claim 3
Dependent Claim
159 words
A current mirror circuit comprising a first transistor, a diode-connected second transistor connected in series to said first transistor, a third transistor having a base which is connected to a base of said first transistor, a fourth transistor connected in series to the third transistor with a base connected to a base of said second transistor, and a fifth transistor having an emitter which is connected to the base of said first transistor, a base connected to a collector of said first transistor and a collector directly connected to a collector of said fourth transistor, an output for an output signal current I-2I B /h FE at the collector of the fifth transistor, an input for an input signal current I to a collector of said second transistor, wherein I B is the base current of said first and third transistors and h FE is the grounded emitter current amplification of the first, second, third, fourth and fifth transistors.
Claim 4
Dependent Claim
159 words
A current mirror circuit comprising a first transistor, a diode-connected second transistor connected in series to said first transistor, a third transistor having a base which is connected to a base of said first transistor, a fourth transistor connected in series to the third transistor with a base connected to a base of said second transistor, and a fifth transistor having an emitter which is connected to the base of said first transistor, a base connected to a collector of said first transistor and a collector directly connected to a collector of said fourth transistor, an output for an output signal current I-2I B /h FE at the collector of the fifth transistor, an input for an input signal current I to a collector of said second transistor, wherein I B is the base current of said first and third transistors and h FE is the grounded emitter current amplification of the first, second, third, fourth and fifth transistors.
Claim 5
Dependent Claim
144 words
A current circuit comprising: a first transistor having an emitter, a base and a collector; a second transistor having an emitter connected to the collector of the first transistor, a collector and a base connected together, wherein the collector is receptive of an input current applied thereto; a third transistor having a base connected to the base of the first transistor, an emitter connected to the emitter of the first transistor and a collector; a fourth transistor having an emitter connected to the collector of the third transistor, a base connected to the base of the second transistor and a collector from which an output is obtained; and a fifth transistor having an emitter connected to the base of the first transistor, a base connected to the collector of the first transistor and a collector directly connected to the collector of the fourth transistor.
Claim 6
Dependent Claim
144 words
A current circuit comprising: a first transistor having an emitter, a base and a collector; a second transistor having an emitter connected to the collector of the first transistor, a collector and a base connected together, wherein the collector is receptive of an input current applied thereto; a third transistor having a base connected to the base of the first transistor, an emitter connected to the emitter of the first transistor and a collector; a fourth transistor having an emitter connected to the collector of the third transistor, a base connected to the base of the second transistor and a collector from which an output is obtained; and a fifth transistor having an emitter connected to the base of the first transistor, a base connected to the collector of the first transistor and a collector directly connected to the collector of the fourth transistor.
Claim 7
Dependent Claim
15 words
The circuit according to claim 3, wherein all of the transistors have the same polarity.
Claim 8
Dependent Claim
14 words
The circuit according to claim 3, wherein the transistors are of the pnp type.
References Cited (Backward Citations)
US3936725A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1992-01-31 | 1992-08-01 | 1993-01-31 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1996-01-31 | 1996-08-01 | 1997-01-31 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2000-01-31 | 2000-08-01 | 2001-01-31 | $7700.00 | Window Closed / Lapsed |